17–21 Jun 2024
CERN
Europe/Zurich timezone

US-Japan project proposal : Capacitive Coupled Low Gain Avalanche Diode (AC-LGAD) detectors.

18 Jun 2024, 15:50
10m
500/1-001 - Main Auditorium (CERN)

500/1-001 - Main Auditorium

CERN

400
Show room on map

Speaker

Koji Nakamura (High Energy Accelerator Research Organization (JP))

Description

This research program, which is submitted to the US-Japan Cooperation Program in HEP, aims to advance the development of silicon detectors, focusing on the technology that achieves O(10) picoseconds time resolution for minimum ionizing particles (MIP) together with a spatial resolution of the order of O(10) microns. It includes as a goal the implementation of a versatile testing system for prototype characterization and design of readout electronics that can match the sensor layout and performance. In this research program we will develop a prototype of a highly granular silicon precision timing detector, i.e.
a 4D detector, for future colliders, using Capacitor-Coupled Low gain Avalanche Diode (AC-LGAD) technology. The radiation tolerance of such detectors will be investigated and techniques to improve radiation-hardness will be studied. KEK, University of Tsukuba with
Hamamatsu Photonics K.K. (HPK) and BNL are developing novel designs of AC-LGAD sensors and a versatile benchmarking system will be developed and implemented at the Fermilab Test Beam Facility that will be used for precise characterization of sensors developed in this program together with colleagues at UCSC and LBNL. Dedicated readout electronics will be studied and prototyped, building upon existing fast-time ASIC designs.
The project includes the ambitious scope opportunity to develop a monolithic LGAD for low-mass detector applications, if funds allow.

Presentation materials