Speaker
Description
ABSTRACT
I present a novel approach for radiation detection utilizing neural networks implemented on-chip in a pixelated readout hybrid X-ray detector (HPAD). In HPADs, when a photon hits a detector, a cloud of charge is generated in a sensor material and attracted to the electrode located at the input of the pixel. One of the problems that occurs in this type of detector is the so-called charge-sharing effect. The charge-sharing phenomenon happens when a photon hits the detector in the region in between the pixels, and a cloud of charge is split between them, causing loss or misinterpretation of information. The issue significantly affects especially detectors with small-size pixels, for which the effect is more visible.
In recent years, few groups have implemented artificial neural networks inside readout integrated circuits for embedded radiation signal processing, e.g. [1], [2]. At IEEE Nuclear Science Symposium 2023, our AGH-UST group presented the HPAD X-ray detector with an on-chip and in-pixel artificial neural network dedicated to precise photon energy measurement [3], [4].
Building upon the success of previous implementation of in-pixel artificial neural network, with this paper I continue the exploration of potential neural network applications in X-ray detectors toward the charge-sharing effect and consequently an improvement of HPAD detectors’ spatial resolution. I present the approach that utilizes two types of neural networks implemented inside the readout circuit: a spiking neural network followed by the implementation of the artificial neural network. I present the design of the proposed solution and its simulation results.
REFERENCES
[1] A. Muntean et al., “On-Chip Fully Reconfigurable Artificial Neural Network in 16 nm FinFET for Positron Emission Tomography,” IEEE J. Sel. Top. Quantum Electron., vol. 30, no. 1, pp. 1–13, 2024, doi: 10.1109/JSTQE.2023.3346957.
[2] S. Di Giacomo, M. Ronchi, G. Borghi, M. Carminati, and C. E. Fiorini, “A CMOS Implementation of a Switched Capacitor Analog Neural Network ASIC (ANNA),” no. February, pp. 1–1, 2023, doi: 10.1109/nssmicrtsd49126.2023.10338747.
[3] A. Koziol et al., “Semiconductor sensor readout integrated circuit with in-pixel artificial neural network for pulse amplitude measurement", IEEE Nuclear Science Symposium, Vancouver, Canada, 2023
[4] A. Koziol et al., “Artificial neural network on-chip and in-pixel implementation towards pulse amplitude measurement,” J. Instrum., vol. 18, no. 2, 2023, doi: 10.1088/1748-0221/18/02/C02048.
| Workshop topics | Detector systems |
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