FDF Seminar: Smash HDL bugs on the fly! (D. Radocon)

Tuesday 24 Sept 2024, 16:00 → 17:00 Europe/Zurich

Davide Cieri (Max Planck Society (DE)), Francesco Gonnella (University of Birmingham (GB)), Rui Zou (Cornell University (US))

16:00 → 16:10 Introduction

Speakers: Dr Francesco Gonnella (University of Birmingham (GB)), Dr Rui Zou (Cornell University (US))

FDF Seminar Intro RZou.pdf

16:10 → 16:40 Smash HDL bugs on the fly!

Speaker: Mr David Racodon (Linty Services)

Linty-VHDL-Verilog-Demonstration-CERN.pdf

 

Linty helps leading-edge teams write reliable (bug-free), secure and highly maintainable VHDL and Verilog code.

Linty is likely to become your favorite companion. We can guarantee that it will:

1. Be there to help your from the first line of code to the production of your FPGA/ASIC (and even after during maintenance)
2. Always please you with nice surprises
3. Never rant or get angry
4. Be continuously doing its duty without getting exhausted

This demo will highlight Linty's great features:

1. Easy integration within your continuous integration process (GitHub, GitLab, Bitbucket, Jenkins, etc.)
2. Clean as you code with Linty HDL Designer: Powerful VS Code extension
   Focus on new/modified code
3. Actionable feedback for all project stakeholders: designers, testers, managers and auditors
4. Automated qualification kit (DO-254, DO-330, IEC 61508, EN 50129, ISO 26262, etc.)
5. Based on SonarQube, leading code quality platform

16:40 → 17:00 Q&A and discussion

Speaker: Dr Francesco Gonnella (University of Birmingham (GB))