2nd FPGA Developers' Forum (FDF) meeting

Session

Hardware Development

22 May 2025, 14:10

500/1-001 - Main Auditorium (CERN)

Conveners

Hardware Development

• Mathieu Saccani (CERN)

67. Architecting FPGA for low power Leadership

Dr Hardik Shah (Lattice Semiconductor)

22/05/2025, 14:10

Reducing power consumption in FPGAs offers a range of benefits across various applications, including: extended battery life, simplified heat sink requirements, reduced complexity of the PCB power network, the potential for smaller package sizes, minimized heat-related measurement errors, and increased component longevity. Achieving energy-efficient FPGA design demands a comprehensive...