2nd R2EWG Workshop

Tuesday 6 May 2025, 10:00 → 12:55 Europe/Zurich

40/S2-D01 - Salle Dirac (CERN)

Salvatore Danzeca (CERN), Rudy Ferraro (CERN)

The R2EWG event will be held in the 40/S2-D01 - Salle Dirac and streamed on zoom.

The agenda will focus on the latest results from the radiation test service and on presentations on radiation-tolerant, hardened and commercial microcontrollers (soft and hard cores).

Official website: https://radwg.web.cern.ch/

 

10:00 → 10:20 Introduction

Speaker: Salvatore Danzeca (CERN)

2nd_R2EWG_final.pdf

2nd_R2EWG_final.pptx

10:20 → 10:40 BE-CEM-EPR Radiation Test Service: Activities Overview

Speaker: Rudy Ferraro (CERN)

2nd R2EWG.pdf

2nd R2EWG.pptx

10:40 → 11:00 Radiation Effects on COTS Microcontrollers: Test Methodology, Qualification Results, and Mitigation Strategies

Speaker: Dr Alessandro Zimmaro (CERN (BE-CEM/EPR))

Radiation Effects on COTS Microcontrollers.pdf

Radiation Effects on COTS Microcontrollers.pptx

11:00 → 11:20 Hydra: FPGA Soft Core for Rad-Tolerant DI/OT

Speaker: Alen Arias Vazquez (CERN)

R2EWG-DIOT-Hydra.pdf

11:20 → 11:40 SOCRATES: A System-On-Chip RAdiation Tolerant EcoSystem for ASIC designs and microcontrollers in HEP applications

Speaker: Kostas Kloukinas (CERN)

R2EWG Kloukinas 20250506.pdf

R2EWG Kloukinas 20250506.pptx

11:40 → 12:00 HARV-SoC - A Fault-aware RISC-V SoC for Radiation Harsh Environments

The openness and customizability of RISC-V processors have made them promising candidates for high-reliability applications, including radiation-harsh environments. This work presents the implementation of a RISC-V processor that integrates error detection and monitoring into redundant structures of the processor. Our key contribution is a fault-aware RISC-V SoC that enhances real-time fault analysis, system recovery, and radiation testing through improved fault model characterization. The presentation will show results from two irradiation facilities, with neutron and mixed-field irradiation spectra. This implementation has demonstrated to be effective, and provides critical insights into fault mechanisms and enable a more robust SoC design.ents

Speakers: Douglas Almeida dos Santos (University Of Montpellier), Prof. Luigi Di Lillo (UM2)

2025-05 - HARV-SoC - CERN R2EWG (2).pdf

12:00 → 12:20 Open Discussions