Speaker
Description
A burn-in campaign of the Phase-2 CMS Outer Tracker backend electronics is performed on pre-production Serenity and Apollo boards prior to deployment. The setup consists of two fully populated ATCA crates, with all optical links active simultaneously, enabling operation in a realistic and highly interconnected environment. Particular emphasis is placed on validation of optical interfaces (FireFly), which are not fully tested at board level, especially for Serenity boards. The campaign targets early detection of faulty optical components and system-level validation of the board design under FPGA load and full connectivity. Results on board and system performance are presented.
Summary (500 words)
The Phase-2 CMS Outer Tracker backend electronics must meet stringent reliability and performance requirements to operate under HL-LHC conditions. To validate both individual components and system-level behaviour, a comprehensive burn-in campaign has been developed based on a realistic large-scale setup.
The burn-in system consists of a rack integrating two fully populated ATCA crates hosting Serenity (DTC) and Apollo (Track Finder) boards, together with DTH units. The system is operated with all input and output optical links active simultaneously, reproducing the expected detector configuration and data flow. The rack is cooled using water-based heat exchangers, providing stable thermal conditions representative of final deployment.
The campaign focuses on pre-production hardware, including an initial batch of 12 Serenity and 12 Apollo boards, and is designed to validate both board-level performance and full-system integration. In particular, it addresses a known gap in optical validation: while Apollo boards implement preliminary checks, Serenity boards do not perform full validation of optical transceivers (FireFly). The burn-in setup therefore provides a critical environment to identify early failures in optical components under realistic load conditions.
The test configuration exercises all interconnections between boards, including high-speed links between frontend interfaces, processing FPGAs, and backend aggregation stages. Continuous operation is performed over extended periods, with all links active and FPGAs under sustained processing load. The burn-in campaign is designed to detect early-life failures, monitor stability, and assess system robustness. Key observables include link integrity, error rates, board initialization reliability, and system behaviour under repeated configuration cycles.
The results provide insight into both individual board performance and the behaviour of the full rack system. At the board level, the tests allow identification of faulty components, in particular optical devices, and verification of FPGA operation under stress. At the system level, the setup enables evaluation of large-scale integration aspects, including synchronization, data flow consistency, and interaction between multiple processing stages.
The burn-in infrastructure is also designed for continuous use during production, with tests planned on a regular basis as new boards become available. Monitoring tools, including software-based telemetry and visualization frameworks (e.g. Grafana), are being developed to support long-term operation and data analysis.
Beyond hardware validation, the setup provides a platform for firmware and software stress testing, as well as for future expansion toward larger integration slices of the Tracker backend system. It directly supports validation of the Backend Electronics System (BES) design and contributes to the definition of quality assurance procedures and operational strategies.
This work demonstrates the importance of large-scale burn-in testing in a realistic environment, combining high channel density, full optical connectivity, and controlled thermal conditions. The results are essential for validating the readiness of the Phase-2 CMS Tracker backend electronics and mitigating risks associated with large-scale deployment at HL-LHC.