Speaker
Dr
Nanae Taniguchi
(KEK)
Description
For the Belle-II experiment at KEK, a Central Drift Chamber (CDC) with a readout electronics are required to be upgraded to cope with the design luminosity of 8 x 10^35/cm^2s. The readout electronics system will be completely replaced.
The new readout electronics system must handle higher trigger rates with less dead time. The front-end electronics are located close to detector and send digitized signal through optical fibers. The new ASIC chips, FADC and FPGA are assembled on a single board. An amplifier, shaper and discriminator are implemented in the ASIC chip. The drift time and signal charged are measured with a TDC on the FPGA and a slow FADC, respectively. In this talk, the latest results of the R&D and the performance of the readout board with test beam will be presented.
| quote your primary experiment | Belle II |
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Primary author
Dr
Nanae Taniguchi
(KEK)
