Jun 2 – 6, 2014
Beurs van Berlage
Europe/Amsterdam timezone

The Serial Link Processor for the Fast TracKer (FTK) processor at ATLAS

Jun 3, 2014, 11:00 AM
Administratiezaal (Beurs van Berlage)


Beurs van Berlage

Oral Data-processing: 3c) Embedded software III.c Embedded Software


Pierluigi Luciano (Sezione di Pisa (IT))


The Associative Memory (AM) system of the FTK processor has been designed to perform pattern matching using the hit information of the ATLAS silicon tracker. The AM is the heart of the FTK and it finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problem inside the FTK, multiple designs and tests have been performed. The currently proposed solution is named the “Serial Link Processor” and is based on an extremely powerful network of 2 Gb/s serial links. This paper reports on the design of the Serial Link Processor consisting of the AM chip, an ASIC designed and optimized to perform pattern matching, and two types of boards, the Local Associative Memory Board (LAMB), a mezzanine where the AM chips are mounted, and the Associative Memory Board (AMB), a 9U VME board which holds and exercises four LAMBs. We report also on the performance of a first prototype based on the use of a min@sic AM chip, a small but complete version of the final AM chip, built to test the new and fully serialized I/O. Also a dedicated LAMB prototype, named miniLAMB, with reduced functionalities, has been produced to test the mini@sic. The serialization of the AM chip I/O significantly simplified the LAMB design. We report on the tests and performance of the integrated system mini@sic, miniLAMB and AMB.

Primary author

Pierluigi Luciano (Sezione di Pisa (IT))

Presentation materials