14-18 October 2013
Amsterdam, Beurs van Berlage
Europe/Amsterdam timezone

Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization

15 Oct 2013, 15:45
20m
Verwey Kamer (Amsterdam, Beurs van Berlage)

Verwey Kamer

Amsterdam, Beurs van Berlage

Oral presentation to parallel session Data acquisition, trigger and controls Data Acquisition, Trigger and Controls

Speaker

Markus Frank (CERN)

Description

The LHCb experiment at the LHC accelerator at CERN collects collisions of particle bunches at 40 MHz. After a first level of hardware trigger with output of 1 MHz, the physically interesting collisions are selected by running dedicated trigger algorithms in the High Level Trigger (HLT) computing farm. This farm consists of up to roughly 25000 CPU cores in roughly 1600 physical nodes each equipped with at least 1 TB of local storage space. This work describes the architecture to treble the availible CPU power of the HLT farm given that the LHC collider in previous years delivered stable physics beams about 30 % of the time. The gain is achieved by splitting the event selection process in two, a first stage reducing the data taken during stable beams and buffering the preselected particle collisions locally. A second processing stage running constantly at lower priority will then finalize the event filtering process and benefits fully from the time when LHC does not deliver stable beams e.g. while preparing a new physics fill or during periods used for machine development.

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