May 19 – 23, 2014
Europe/Paris timezone

Status report from Tokyo Tier-2 for the one year operation after whole scale system upgrade

May 20, 2014, 10:00 AM
Auditorium Marcel Vivargent (LAPP)

Auditorium Marcel Vivargent


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Tomoaki Nakamura (University of Tokyo (JP))


The Tokyo Tier-2, which is located at International Center for Elementary Particle Physics (ICEPP) in the University of Tokyo, was established as a regional analysis center in Japan for the ATLAS experiment. The official operation with WLCG was started in 2007 after the several years’ development since 2002. In December 2012, we have replaced almost all hardware as the third system upgrade to deal with analysis for further growing data of the ATLAS experiment. The number of CPU cores are increased by a factor of two from the previous system (9984 cores including CPUs for service instance), and the performance of individual CPU core is improved by 20 % according to the HEPSPEC06 benchmark test at 32bit compile mode. The score is estimated as 18.03 per core under Scientific Linux 6 by using Intel Xeon E5-2680 2.70 GHz. As of February 2013, 2560 CPU cores and 2.00 PB of disk storage have already been deployed for ATLAS. They have been operated stably with 95% availability in one year operation after the system upgrade. Since the number of CPU cores in the new worker node was increased from 8 cores to 16 cores, the local I/O performance for the data staging area might become a possible bottleneck for the job throughput. We have evaluated the performance by making a special worker node, which have a SSD for the local storage, at the mixture situation of running real ATLAS production jobs and analysis jobs. In consequence, we could confirm that SAS-HDD attached with nominal worker nodes at Tokyo Tier-2 is not a bottleneck for the long batch type jobs at least for the situation of 16 jobs running concurrently in one node. In this report, we would like to introduce several results of the evaluation of the local I/O performance with some experiences on the site operation.

Primary author

Tomoaki Nakamura (University of Tokyo (JP))


Hiroshi Sakamoto (University of Tokyo (JP)) I Ueda (University of Tokyo (JP)) Nagataka Matsui (University of Tokyo (JP)) Prof. Tetsuro Mashimo (University of Tokyo (JP))

Presentation materials