The strategy for Insertable B-Layer (IBL) Readout-Driver (ROD) firmware development was three-fold: keeping as much of the Pixel ROD datapath firmware logic as possible, employing a complete new scheme of steering and calibration firmware and designing the overall system to prepare for a unified code version integrating IBL and Pixel layers. Essential features such as data formatting, frontend-specific error handling, and calibration are added to the ROD data path. An IBL DAQ testbench using realistic frontend chip model was created to serve as an initial framework for full offline electronic system simulation.
In this document, major hardware and firmware achievements concerning the IBL ROD data path implementation, tested in testbench and on ROD prototypes, will be reported.
For ATLAS Pixel Detector Layer 2, which requires 26 additional pairs of Back-of-Crate (BOC) and ROD cards, we have carried out a new production of the IBL cards for further boards. In fact, the IBL boards can easily expand the bandwidth of Pixel Layer 2 as long as we provide dedicated firmware to interface with the present detector and, in particular, with the FEI3 chips instead of the IBL FEI4s. For Layer 2, including the spare cards used also for IBL, 40 RODs have been fabricated in 2014 and are going to be installed in 2015, just after the IBL commissioning. The same approach used for upgrading the Layer 2 will be used to upgrade the 38 ROD cards used in the Pixel Detector Layer 1. This additional production has not yet started and the plan is to have it completed by the end of 2015. Implementation of the new DAQ boards for Layer 1 is instead planned for the shut down of winter 2016.