MacroPixelASIC (MPA): The readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

by Davide Ceresa (CERN)

Tuesday 10 Mar 2015, 09:00 → 10:00 Europe/Zurich

13/2-005 (CERN)

The Phase-II upgrade of LHC (HL-LHC) entails new challenges in the design of the CMS Outer Tracker as it has to provide data for the level-1 track trigger for each bunch crossing (40 MHz) and a global event processing upon reception of a 500 kHz – 1 MHz L1 trigger.
Two types of tracker modules are in development, one of them combining a pixel detector and a strip detector (PS module). The readout electronics of the PS modules must combine high speed and low power dissipation and is based on an ASIC described in this seminar: the Macro Pixel ASIC (MPA). It is a hybrid pixel detector readout chip with a pixel array of 1920 pixels of 100 x 1496 µm². The synchronous and binary pixel output is processed on-chip to find L1 track trigger primitives and to encode the positions of the tracks. Rad-hard memories store the track positions which are sent out only upon receipt of a L1 trigger, while the readout of the primitives is data-driven. Test and characterization results from the first MPA prototype ASIC, the MPA-Light ASIC, will be also presented.

Transparents Seminar_MPA.pdf Seminar_MPA.pptx