Feb 15 – 19, 2016
Vienna University of Technology
Europe/Vienna timezone

A low mass vertically integrated pixel system for the HL-LHC

Feb 18, 2016, 4:30 PM
Vienna University of Technology

Vienna University of Technology

Gusshausstraße 27-29, 1040 Wien
Talk Semiconductor Detectors Semiconductor Detectors


Cinzia Da Via (University of Manchester (GB))


We will present the first characterization of a low mass, vertically integrated modular system optimized for the demanding thermal environments expected in the innermost layers of LHC experiments after the PH2 upgraded luminosity. The system is composed by a stack of three silicon layers for a total thickness of less than 1mm. From the top a radiation hard, 230 micron thick 3D silicon sensor (fabricated at CNM-Barcelona) with the same design of the ones used for the ATLAS-Insertable-B-Layer, integrated to a 100 micron thick FE-I4 front-end electronics pixel chip and a silicon micro-channel layer designed to circulate evaporated CO2. The paper will show the system electrical and thermal functionalities, discuss results on the use of 3D printed ceramic components which could further improve the detector system’s large area design and conclude with future plans.

Primary author

Cinzia Da Via (University of Manchester (GB))


Giulia Romagnoli (Universita e INFN Genova (IT)) Giulio Pellegrini (Centro Nacional de Microelectrónica (IMB-CNM-CSIC) (ES)) Malte Backhaus (CERN) Paolo Petagna (CERN)

Presentation materials