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Local organisers12/09/2005, 14:00Oral
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Dr Roger Bailey (CERN)12/09/2005, 14:15After a brief reminder of the installation schedule and the performance goals that the LHC aims to achieve, the strategy for commissioning with protons is presented. Dedicated runs with ions and protons are mentioned, and how machine operation may be scheduled through a year is shown. Potential trouble spots during the operational cycle are then highlighted and an estimate of the...Go to contribution page
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Dr Thijs Wijnands (CERN)12/09/2005, 15:00The impact of particle losses on the operation of the LHC machine and experiments will be discussed. It will be shown how the risk of radiation induced failure to equipment can be reduced via shielding, radiation tolerant equipment designs and on- line radiation monitoring. A number of critical cases for the LHC Machine Experiments interface will be highlighted. Recent data on beam...Go to contribution page
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Prof. Antonio Ciccolella (ESA-ESTEC)12/09/2005, 16:15Distributed power systems offer many benefits to system designers over central power systems such as reduced weight and size. Distributed systems also allow the designers to control the quality of power at different loads and subsystems, since DC-DC converters allow close regulation of output voltage under wide variations of input voltages and loads. Distributed power systems also...Go to contribution page
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Dr Robert Stokstad (Lawrence Berkeley National Laboratory, for the IceCube Collaboration)12/09/2005, 17:00OralThe first sensors of the IceCube Neutrino Observatory were deployed at the South Pole in January 2005 – 60 modules on one string at depths from 1450 to 2450 meters and 16 modules in eight tanks at the surface. We present an overview of the electronics for IceCube and demonstrate their performance with experimental data obtained for cosmic ray muons. Analog waveforms of pmt signals are...Go to contribution page
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Dr Ehrenfried Seebacher (Austriamicrosystems)13/09/2005, 09:00We discuss state of the art and new developments for the characterization of CMOS technologies. In the first chapter the most important issues of MOS transistor modeling will be shown. Topics like AC/DC modeling, noise modeling and temperature modeling for the MOS transistor will be explained. State of the art MOS transistor models like the BSIM3 and BSIM4 models as well as the...Go to contribution page
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Dr Massimo Manghisoni (Università degli Studi di Bergamo)13/09/2005, 09:45OralDeep submicron CMOS technologies are widely used for the implementation of low noise front-end electronics in various detector applications. In this field the designers’ effort is presently focused on 0.13 micron technologies. This work presents the results of noise measurements carried out on CMOS devices in 0.13 um commercial processes from different foundries. The study also...Go to contribution page
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Dr Marcel Stanitzki (Yale University)13/09/2005, 10:10OralThe CDF Silicon Vertex detector consists of three subdetectors: SVX-II, ISL and L00. Altogether it consists of 8 layers of Silicon with more than 750000 readout channels. This detector is essential for CDF's high precision tracking and is vital for the forward tracking capabilities and the identification of heavy flavor decays. After four years of data taking in Run-II and a delivered...Go to contribution page
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Dr Domenico Lo Presti (Catania University-Physics Department)13/09/2005, 11:00A cubic KM scale underwater neutrino detector requires thousands of photomultipliers whose signal must be acquired and transferred through an electro-optical cable to shore for analysis and storage. The transferrable power and data bandwidth of this cable is limited. The work described here has been developed in the context of the NEMO Collaboration with the aim of studying and...Go to contribution page
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Mr Ralf Spiwoks (CERN)13/09/2005, 11:00The ATLAS Level-1 Central Trigger Processor (CTP) combines information from calorimeter and muon trigger processors and makes the final Level-1 Accept (L1A) decision on the basis of lists of selection criteria (trigger menus). In addition to the event-selection decision, the CTP also provides trigger summary information to the data acquisition system and the Level-2 trigger. It further...Go to contribution page
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Joannes HALLER (CERN), Ralf Spiwoks (CERN)13/09/2005, 11:25OralThe ATLAS detector at CERN's LHC will be exposed to proton-proton collisions at a rate of 40 MHz. In order to reduce the data rate, only potentially interesting events are selected by a three-level trigger system. Its first level is implemented in electronics and firmware, and aims at reducing the data output rate to about 75 kHz. The second and third trigger levels are based on...Go to contribution page
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Mr Hugo Furtado (CERN)13/09/2005, 11:25OralA five channel programmable delay line ASIC was designed, fabricated and tested. The IC features 4 channels that allow to phase delay periodic or non-periodic digital signals and a master channel that can be used to phase delay a clock signal. The master channel serves as a calibration reference guaranteeing independence from process, supply voltage and temperature variations. The...Go to contribution page
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Mr Thilo Pauly (European Organization for Nuclear Research (CERN))13/09/2005, 11:50The ATLAS detector at CERN's LHC will be exposed to proton-proton collisions at a bunch-crossing rate of 40 MHz. In order to reduce the data rate, a three-level trigger system selects potentially interesting events. Its first level is implemented in electronics and firmware, and aims at reducing the output rate to under 100 kHz. The Central Trigger Processor (CTP) combines...Go to contribution page
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Mr Edward Bartz (Rutgers University)13/09/2005, 11:50OralTo coordinate groupings of pixel readout chips, the Token Bit Manager (TBM), has been developed for the CMS experiment. The TBM will coordinate passing of the readout token around a group readout chips (ROC). In addition it supplies the DAQ with a header and trailer record to facilitate event recognition. Also present on the same chip is a Control Network Hub, which directs...Go to contribution page
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Mr Marcel Trimpl (Bonn University)13/09/2005, 12:15OralFor a very fast readout of a DEPFET pixel matrix at the ILC (International Linear Collider) the 128 channel CURO II ASIC has been designed and fabricated in a 0.25 µm process. Due to the signal of the sensor being a current, the architecture of the chip is completely based on current mode (SI) techniques. This comprises double-correlated-sampling in the analog front end with...Go to contribution page
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Mr Hannes Sakulin (Institute for High Energy Physics, Vienna, and CERN)13/09/2005, 12:15OralIn CMS, three independent first-level muon trigger systems identify muon candidate tracks. The Global Muon Trigger (GMT) receives up to 16 candidate tracks and combines them using algorithms exploiting the complementarity of the muon systems. The GMT also correlates the muon candidate tracks with calorimeter regions in order to determine muon isolation or confirmation by the calorimeter....Go to contribution page
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Dr Orlando Villalobos Baillie (University of Birmingham)13/09/2005, 12:40OralThe Alice Central Trigger Processor is described. The current trigger concept was introduced in 2001 and allows up to 50 trigger inputs at three different levels: level 0 (24 inputs, 1.2 μs latency); level 1 (20 inputs, 6.5 μs latency); level 2 (6 inputs, 88 μs latency). Up to 50 trigger classes (where inputs and destination detectors are specified) can be used simultaneously. Detailed...Go to contribution page
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Mr N. Spencer (UC Santa Cruz)13/09/2005, 14:15OralFor the potential use in future high luminosity application in HEP (e.g. the LHC upgrade), we evaluated the radiation hardness of a candidate technology for the front-end of the readout ASIC for silicon strip detectors. The devices were test transistors of various geometries manufactured in the first generation, IBM SiGe 5HP process. Current gain as a function of collector current has been...Go to contribution page
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Mr Ervin DÉNES (KFKI Research Institute for Particle and Nuclear Physics, Budapest)13/09/2005, 14:15OralThe ALICE Detector Data Link (DDL) is a high-speed optical link designed to interface the readout electronics of ALICE sub-detectors to the DAQ computers. The Source Interface Unit (SIU) of the DDL will operate in radiation environment. Tests showed that configuration loss of the ALTERA APEX II FPGA device used earlier on the DDL SIU card is only marginally acceptable. We developed a...Go to contribution page
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Mr Ketil Røed (Faculty of Engeneering, Bergen University College, Norway)13/09/2005, 14:40OralThe ALICE TPC Front End Electronics will be operated in a radiation field of up to 800 hadrons/cm2sec. SRAM-based FPGAs are used on the Front-End Cards (FEC) and the Read-out Control Units (RCU). Several irradiation tests of all components on the cards have ensured that the components selected are able to withstand the radiation environment, but have also shown that single event upsets...Go to contribution page
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Mr Paul Douglas Jackson (Department of Physics, The Ohio state University)13/09/2005, 14:40OralWe have developed a radiation-hard optical link for the ATLAS pixel detector at the LHC at CERN. The driver and receiver chips are implemented in 0.25 micron CMOS technology using enclosed layout transistors and guard rings for increased radiation hardness. The former drives the Vertical Cavity Surface Emitting Laser (VCSEL) diode to transmit 80 Mbit/s data from the detector. The...Go to contribution page
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Dr Federico Faccio (CERN)13/09/2005, 15:05We have developed a radiation-tolerant Low Drop-Out (LDO) voltage regulator for applications in High Energy Physics experiments. The regulator outputs a fixed voltage of 2.5V, it provides a maximum current of 300mA with a drop-out as low as 150mV. The circuit incorporates over-current, over-voltage and over-temperature protection, and it can be disabled via a dedicated input pin....Go to contribution page
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Dr Anthony Weidberg (Nuclear Physics Laboratory)13/09/2005, 15:05OralThe on detector optical links for the SCT have been produced and mounted on the detector. Most of the off-detector opto-electronics has also been produced and has been used to successfully read out modules assembled on barrels and End Cap disks. Many problems were encountered during the production and these will be described. The lack of modularity in the system design has been a major...Go to contribution page
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Dr Markus Friedl (HEPHY Vienna)13/09/2005, 15:30OralApproximately 15,000 analog optical transmitter modules with 2 or 3 channels each will be installed in the CMS experiment to read out the Silicon Strip Tracker. These Analog Optohybrids were produced in Austrian and Italian industries from mid- 2003 to mid-2005. After assembly, each unit was thoroughly tested for electrical and optical properties and all results are stored in the CMS...Go to contribution page
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Dr Venelin Angelov (KIP, Uni-Heidelberg)13/09/2005, 15:30The ALICE TRD has over 1,2 million analog channels that will be digitized at 10MSPS with 10-bit resolution. We have developed a TRAcklet Processor (TRAP) ASICs implementing 22 extra low power ADCs, digital filters, four RISC processors with shared memory, slow control serial interface and fast parallel 4-in 1-out readout tree ports. Together with the preamplifier chip they build a...Go to contribution page
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Mrs Cigdem Issever (University of Oxford)13/09/2005, 16:25OralThe readout system of the ATLAS inner detector for SLHC will need to cope with ten time’s higher radiation doses than the current ATLAS inner detector readout system. It is an open question of whether the current opto-electronic readout system could be used at SLHC. This is a critical question for the detector design as it will have a major influence on the layout of the readout. We have...Go to contribution page
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Dr Luca Toscano (INFN Sezione di Torino, Italy)13/09/2005, 16:25OralThis paper presents the wafer-level testing system developed for the front-end electronics of the Silicon Drift Detectors of ALICE. The system is based on a semiautomatic probe station and has been designed to test two different ASICs with minimal changes in the hardware. All the operations are controlled by a PC running a dedicated LabView software. The architecture of the test system is...Go to contribution page
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Dr Markus AXER (CERN)13/09/2005, 16:50OralLasers and photodiodes used currently in CMS, alongside new, faster components, were irradiated for the first time to very high neutron fluences, up to 2x10^16n/cm2. The usual radiation effects in lasers and photodiodes were observed, with the ultimate failure point of the device being observed for the first time. As this was a particularly aggressive test these types of components are...Go to contribution page
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Mr Nikolaos Manthos (University of Ioannina)13/09/2005, 16:50OralPACE3 is the 32-channel large dynamic range front-end amplifier, shaper and analogue memory for the CMS Preshower detector. Around 4300 PACE3, designed in 0.25micron CMOS, are required for the detector. Production of the chips has been completed and the packaged chips (fpBGA) evaluated using a custom testbench equipped with a ZIF socket under LabVIEW control. The tests are described and...Go to contribution page
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Dr Jan Troska (CERN)13/09/2005, 17:15OralWe report on the evaluation of Commercial Off-The-Shelf (COTS) optical transceivers for use in future readout and control systems of upgraded detectors for SLHC. The critical performance metrics and operational constraints on the required inputs – notably the reference clocks – will be described. Measurements of these performance metrics on samples of COTS small form-factor XFP...Go to contribution page
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Dr Achim Vollhardt (EPF Lausanne)13/09/2005, 17:15OralWe give an overview on the status of production of the LHCb Silicon Tracker Electronics. Lessons learned together with the industry in the preseries production of the Silicon Tracker Digitizer Boards were integrated into the design to optimize the production and assembly yield of the main batch of 700 Digitizer Boards. A report on the preseries readout module performance and on the...Go to contribution page
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Alesandro Marchioro (CERN)13/09/2005, 17:40
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Francois Vasey (CERN)13/09/2005, 17:40
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Mr Stefano Oggioni (IBM Vimercate)14/09/2005, 09:00There is an increased awareness in the semiconductor industry that packaging technology is an essential and integral part of the semiconductor product, and has become a critical competitive factor in many market segments since it affects operating frequency, power, reliability and costs. Costs pressure over System development investments has created a strong demand in the industry...Go to contribution page
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Mr Daniel Puschmann (GS Praezisions AG), Dr Frank Bose (GS Praezisions AG)14/09/2005, 09:45OralGS Praezisions AG has been involved in the LHC project by providing electronic substrates for several experiments such as the CMS front-end hybrids, CMS Calorimeter, ALICE Silicon Pixel Detector MCM and others. Based on the experience with the designs of the various groups and countries we will highlight the common mistakes, opportunities and challenges in modern PCB design. We...Go to contribution page
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Prof. Frank Lehner (Zurich University)14/09/2005, 10:45OralThe Silicon Tracker of the LHCb experiment consists of four silicon detector stations positioned along the beam line of the experiment. The detector modules of each station are constructed from wide pitch silicon microstrip sensors. Located at the module's end, a polyimide hybrid is housing the front-end electronics. The assembly of the more than 600 hybrids is done at industry. We...Go to contribution page
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Dr Y. Unno (KEK)14/09/2005, 11:10ATLAS semi-conductor tracker (SCT) has chosen the Cu-polyimide flex circuit, reinforced with a carbon-carbon substrate for its ATLAS SCT barrel modules. We report the successes, and problems encountered and solutions, during the course of production of 2,600 pieces of the hybrid.Go to contribution page
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Mr Francois Vasey (CERN), Mr Hans Wyss (CICOREL SA)14/09/2005, 11:35The CMS front-end hybrid project faced in the past years several difficulties which eventually brought it to the top of the CMS list of critical path items. Instead of relating the technical challenges which had to be surmounted, this presentation will attempt to find the root causes of the encountered difficulties. A CMS user and a manufacturer's point of view will make it clear...Go to contribution page
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Mr Rui De Oliveira (CERN)14/09/2005, 12:00The CERN TS/DEM-PMT workshop is specialised in prototype production of many types of circuits for electronic interconnection in the nuclear research field. During this talk I will present several technologies used in industry and in our workshop, ranging from standard PCBs to MultiChip Modules Deposited (MCM-D). The explanation of the production processes will be followed by an...Go to contribution page
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14/09/2005, 12:30
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Mr Michal Dwuznik (AGH University if Science and Technology Krakow)14/09/2005, 14:15OralThe quality assurance system for semi-industrial production scale of multichip hybrid circuits is presented. The hybrids are parts of the silicon strip detector modules of the Semiconductor Tracker (SCT) of the forthcoming ATLAS detector. The hybrid houses the readout and data transmission ASICs, providing the full functionality needed for binary readout of double-sided silicon strip...Go to contribution page
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Dr Markku Oinonen (Helsinki Institute of Physics)14/09/2005, 14:40OralThe silicon strip detector (SSD) modules cover the two outermost layers of the Inner Tracking System of ALICE. The SSD module assembly will be performed at three locations in Europe: Helsinki, Strasbourg and Trieste. After a tedious preparation period within the whole ALICE SSD collaboration, mass production of the SSD modules was launched during autumn 2004 in Helsinki. Presently all...Go to contribution page
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Dr Norbert Wermes (Physikalisches Institut)15/09/2005, 09:00OralPixel detectors have replaced micro strip detectors as vertex trackers in the innermost part of collider detectors. Hybrid pixel detectors, in which sensor and read-out ICs are separate entities, constitute the present state of the art in the pixel technology being able to stand the extreme requirements at the LHC. A number of trends and further developments, most notably monolithic or...Go to contribution page
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Mr Roland Horisberger (PSI)15/09/2005, 09:45Oral
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Dr Yuri ERMOLINE (MSU)15/09/2005, 11:00OralThe ATLAS DAQ/HLT equipment is located in the underground counting room and in the surface building. The main active components are rack-mounted PC's and switches. The issues being resolved during the engineering design are powering and cooling of the DAQ/HLT equipment, monitoring of the environmental parameters, installation and maintenance procedures. This paper describes the ongoing...Go to contribution page
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Dr Kendall Reeves (Uni. Wuppertal)15/09/2005, 11:00OralThe innermost part of the ATLAS (A Toroidal LHC ApparatuS ) experiment at the LHC (Large Hadron Collider) will be a pixel detector, which is presently under construction. Once installed into the experimental area, access will be extremely limited. To ensure that the integrated detector assembly operates as expected, a fraction of the detector which includes the power supplies and...Go to contribution page
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Mr Christoph Hoermann (University of Zuerich/ Paul Scherrer Institut)15/09/2005, 11:25OralThe central part of the CMS pixel detector will consist of about 800 modules, which are mounted on three concentric barrel layers. The radii of the layers are 4cm, 7cm and 11cm. The modules cover an area of 66.5mm * 18.5mm and have 66560 pixels. The 16 Read Out Chips are connected to the sensor by bump bonds. The performance of the prototype modules has been evaluated in detail in...Go to contribution page
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Mr Markus Joos (CERN)15/09/2005, 11:25OralMost of the off-detector custom electronics of the ATLAS data acquisition system such as the Read-Out Drivers or the Trigger and Timing Control system has been implemented in VMEbus. The paper describes the process of selecting a common VMEbus processor module for all VMEbus systems in ATLAS and the problems encountered during the evaluation of different candidate cards. Some...Go to contribution page
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Masaya ISHINO ((International Center for Elementary Particle Physics (ICEPP), University of Tokyo))15/09/2005, 11:50OralA high voltage system includes 60 high voltage power supply channels in a 2U height EURO crate. The system is interfaced with a computer through USB interface. The output voltage of the channel ranges from 1 kV to 4 kV with an output current of more than 100 uA. Ripples on the output voltage is less than 100 mV in peak-to-peak amplitude. The output voltage can be set and monitored with...Go to contribution page
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Mr Marcos Turqueti (Fermilab)15/09/2005, 11:50OralThe efforts of the Pixel Detector R&D group at Fermilab have been concentrated on meeting the requirements of the pixel detector for the BTeV experiment. In BTeV, the pixel detector would be located close to the beam, and all collected data would be read out for use in the lowest level trigger for track and vertex reconstruction every beam crossing. We present the results of the...Go to contribution page
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Mr Duc Bao Ta (Rheinische Friedrich-Wilhelms Universität Bonn)15/09/2005, 12:15OralWe demonstrate here for the example of the large scale pixel detector of ATLAS that Serial Powering of pixel modules is a viable alternative powering scheme that have been devised and implemented for the modules using dedicated on-chip voltage regulators and modified flex hybrid circuits. The equivalent of a pixel ladder consisting of six serially powered pixel modules with about 0.3...Go to contribution page
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Mr Georges Blanchot (CERN)15/09/2005, 12:15OralThe front end electronics of the ATLAS Liquid Argon Calorimeter is powered by DC/DC converters nearby the front-end crates. They are fed by AC/DC converters located in a remote control room through long power cables. The stability of the power distribution scheme is compromised by the impedance of the long interconnection cable, and proper matching of the converters dynamic impedances...Go to contribution page
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Mr Stefano Petrucci (CAEN CAEN S.p.A., Via Vetraia 11, Viareggio, Italy)15/09/2005, 12:40A compact data acquisition and power supply system housed in a water cooled special crate has been designed for the readout of the TOF (Time Of Flight) detector of the Alice experiment at CERN. The Crate contains a 12 slot VME64X bus that houses 2400 multi-hit 25ps TDC channels (TRM), a Trigger Module (LTM), a Clock Distribution Module (CPDM) and a data readout manger (DRM board) with...Go to contribution page
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Dr Marc Weber (Rutherford Appleton Laboratory)15/09/2005, 12:40OralSerial powering of silicon detectors can dramatically reduce the number of power cables. This will relax space constraints, reduce material, and minimize power losses in cables. A study of the power efficiency of a serial powering scheme for silicon strip detector modules is performed. Numerical results are presented as a function of the number of modules, supply voltage, and cable...Go to contribution page
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Mr Karl Aaron Gill (CERN)15/09/2005, 14:00OralThe recent progress on the CMS Tracker control system is reviewed in depth, with a report of activities and results related to ongoing parts production, acceptance testing, integration and system testing, as well as controls software development. The integration of final parts into Tracker systems and the subsequent testing is described taking the Tracker Outer Barrel as an example application.Go to contribution page
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Mrs Nadia Pastrone (I.N.F.N. Torino)15/09/2005, 14:00OralCMS designed an high precision electromagnetic calorimeter, to be operated reliably in the high radiation environment of the CERN Large Hadron Collider (LHC), inside the 4 T magnetic field. Innovative solutions were developed to place the front-end electronics within the detector with the advantage of minimizing external noise, while reducing the number of optical links to send data...Go to contribution page
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Mr Werner Lustermann (Eidgenoessische Technische Hochschule, ETH Zurich, Switzerland)15/09/2005, 14:25OralThe CMS Electromagnetic Calorimeter consists of roughly 76000 lead tungstate crystals. Nearly 25000 Printed Circuit Boards of 5 different types and about 5500 Gigabit Optical Links are used to process the signals of the photo-detectors and to send the resulting data to the off- detector electronics. The integration of this electronics together with its cooling system, mechanical...Go to contribution page
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Mr Matthias Richter (University of Bergen, Dep. of Physics and Technology)15/09/2005, 14:25OralThe ALICE Time Projection Chamber (TPC) is read out by 4356 Front-End Cards serving roughly 560000 channels. Each channel has to be configured and monitored individually. As one part of the overall controlling of the detector this task is covered by the Detector Control System (DCS). Since fault tolerance, error correction and system stability in general are major concerns, a system...Go to contribution page
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Caroline Collard (LLR Ecole Polytechnique)15/09/2005, 14:50OralThe Front-End (FE) boards are part of the on-detector electronics system of the CMS electromagnetic calorimeter ECAL. Their numerical functionalities and properties are tested by a dedicated test bench located at Laboratoire Leprince-Ringuet, prior to the board integration in the CMS detector at CERN. XFEST, acronym for eXtended Front-End System Test, is designed to perform tests...Go to contribution page
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Dr walter Bonivento (INFN CAGLIARI, Italy)15/09/2005, 14:50OralThe system architecture of the front-end electronics of the LHCb Muon Detector, consisting of wire-chamber detectors and, for a small region, of triple-GEM detectors, is reviewed. The design of the front-end boards and of the ASD chip, the CARIOCA and the CARIOCA-GEM, are discussed in detail, together with the performances measured both with test benches in the lab and on chamber with...Go to contribution page
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Mr Sachin Junnarkar (Brookhaven National Laboratory)15/09/2005, 15:15The ATLAS muon spectrometer will employ Cathode Strip Chambers (CSC) to measure high momentum muons in the extreme forward regions [1]. Preamplification of the charge on the strips is performed in the Amplifier Shaper Module I. Amplifier Shaper Module II performs the analog buffering, digitization of the charge signals from individual cathode strips and multiplexes the data into two...Go to contribution page
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Mr Wojciech Bialas (CERN)15/09/2005, 15:15OralThe CMS Preshower detector (ES) comprises ondetector and offdetector components of the readout and control system, as well as the powering system and optical links. The fast control system is largely built around the one originally conceived for the CMS Tracker (FEC, DOH, CCU etc.) whilst the readout part profits from developments made for the CMS ECAL (DCC, GOH, AD41240). There are two...Go to contribution page
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Dr Kostas Kloukinas (CERN)15/09/2005, 15:40The AD41240 is a custom made 12-bit 40 MSPS, quad-channel, radiation tolerant analog- to-digital converter for the front-end readout electronics of the CMS ECAL and Preshower detectors. The A/D converter features a special digital circuitry to allow automatic selection of gain ranges when it is used with a multi gain pre-amplifier. This paper describes the design architecture of the A/D...Go to contribution page
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Mr Riccardo Vari (Istituto Nazionale di Fisica Nucleare (INFN))15/09/2005, 15:40OralThe ATLAS Barrel Level-1 muon trigger handles data coming from the Resistive Plate Chamber detectors, structured in three concentric layers inside the air-core barrel toroid. The trigger classifies muons within different programmable transverse momentum thresholds, and tags the identified tracks with the corresponding bunch crossing number. The algorithm looks for hit coincidences...Go to contribution page
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Dr Eugenio Scapparone (infn - Bologna)15/09/2005, 16:25OralThe goal of the ALICE Time of Flight detector, based on MRPC technology, is to perform charged particle identification at |eta|<1. This large area (150 m^2), finely segmented detector (~160,000 channels), provides fast signals which will contribute to the L0 and L1 trigger decisions. Hits from the TOF detector are used to determine the multiplicity and topology of the events. This...Go to contribution page
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Dr Alessandro Gabrielli (INFN & Physics Department of Bologna University)15/09/2005, 16:25OralThe paper presents an end-ladder card prototype of the data acquisition chain of the ALICE SDD experiment. The prototype includes most of the electronics devices that will be applied to ALICE SDD experiment. The card interfaces with the front-end electronics and with the counting room detector data link. It has been designed taking into account the constraints on the dimensions of the...Go to contribution page
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Mr Jan de Cuveland (University of Heidelberg)15/09/2005, 16:50The ALICE TRD trigger demands for high-speed computation and low-latency transmission of event data along the complete data path. The module presented here is being developed for the detector's global online tracking unit which contributes to the L1 trigger of the experiment. It is an FPGA-based system utilizing PCI and 12 fibre-optical SFP transceiver interfaces, realized as a...Go to contribution page
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Mr Peter LICHARD (CERN)15/09/2005, 16:50OralThe Transition Radiation Tracker, made of 370’000 cylindrical straws, is a combined tracking and electron identification detector, part of the ATLAS Inner Detector at CERN’s LHC. The back-end electronics, which are in charge of the communication with the front-end boards mounted all around the detector, are made up of two types of 9U VME boards. One type is the ROD boards, collecting,...Go to contribution page
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Mrs Sonia Luengo (La Salle, School of Engineering, Universitat Ramon Llull)15/09/2005, 17:15OralThe SPD (Scintillator Pad Detector) is a part of LHCb calorimetry. Its function is to discriminate between charged particles and neutrals for the LHCb level0 trigger. This detector uses scintillator pad readout by wavelength shifting (WLS) fibbers that are coupled to MAPMT via clear plastic fibbers. The specific features of the SPD detector are the high granularity in the inner part...Go to contribution page
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Mrs Alexandra Oltean15/09/2005, 17:15OralThe electromagnetic Photon Spectrometer (PHOS) of ALICE measures electromagnetic showers up to 100 GeV with PbWO4 crystals and APD's placed a cold zone of -25 C. Readout regions of 448 crystals are combined as coherent trigger regions via analog signals which are processed by one FPGA-based, Trigger Region Unit (TRU). The signals are 2*2 analog sums with 100 ns shaping time, connected...Go to contribution page
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Dr Richard Jacobsson (CERN)15/09/2005, 17:40OralThe LHC RF clock is transmitted over kilometres of fibre to the experiments where it is distributed to thousands of front-end electronics boards. In order to ensure that the detector signals are sampled properly, its long-term stability with respect to the bunch arrival times must be monitored with a precision of <100ps. In addition it is important to monitor the LHC bunch structure...Go to contribution page
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Prof. Joannes Schemmel (Kirchhoff Institut fuer Physik / Electronic Vision(s))16/09/2005, 09:00OralThis talk presents different VLSI models of artificial neural networks ranging from abstract ones using binary neurons to biologically inspired pulse-coupled systems. Circuit examples demonstrating common design principles for optimizing area usage and network speed are shown. The usage of digital communication protocols allows the parallelization of the analog network cores to...Go to contribution page
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Dr Peter ALFKE (Xilinx, Inc. San Jose, CA, USA)16/09/2005, 09:45OralIn step with Moore’s Law, FPGAs are continuing their rapid progress. IC technology makes circuits smaller and faster, while 300 mm wafers with low defect density reduce the cost. Innovative chip structures support adaptation to conflicting user demands, and combine with flip-chip packaging to improve the electrical characteristics. This paper describes several new or enhanced...Go to contribution page
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Mr Gerd Troeger (Kirchoff-Institut fuer Physik, Universitaet Heidelberg)16/09/2005, 10:10Using the FPGA Virtual File System for Dynamic Reconfiguration of FPGAs, we have been investigating improvements to various aspects and components of the ALICE electronics. In this paper, we will briefly summarize the results from our work on improving the radiation tolerance of FPGA-based experiment electronics, followed by a deeper coverage of our more recent work on using the File...Go to contribution page
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Mrs Sophie BARON (CERN)16/09/2005, 11:05OralThe TTC (Timing, Trigger and Control) system broadcasts the timing signals from the LHC machine to the experiments. At the detector level, it integrates the trigger information and local synchronous commands with these signals, for transmission to several thousands of destinations. If the support of the TTC system at the level of the detectors is well in hand, the main network between the...Go to contribution page
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Mr John Jones (Imperial College London)16/09/2005, 11:30OralWe report on preliminary design studies of a pixel detector for CMS at the Super-LHC. The goal of these studies was to investigate the possibility of designing an inner tracker pixel detector whose data could be used for selecting events at the First Level Trigger. The detector considered consists of two layers of 50x50 m2 pixels at very close radial proximity from each other so...Go to contribution page
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Mr Sébastien HEINI (IReS laboratory)16/09/2005, 11:55OralMonolithic Active Pixel Sensor (MAPS) using standard low cost CMOS technology available from industrial manufacturers, have demonstrated excellent tracking performances for minimum ionising particles. The need for highly granular, thin and radiation tolerant pixel arrays equipping the vertex detector foreseen at the future International Linear Collider (and elsewhere) drive an intense...Go to contribution page
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16/09/2005, 12:20Oral
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Mr Jean-Francois Genat (CNRS/IN2P3/LPNHE)PosterA 16-channel readout chip for Silicon strips detectors has been designed in 180 nanometer CMOS technology and tested. It includes low-noise amplification, pulse shaping, sampling and threshold detection. An input referred noise of 190 + 12 electrons/picoFarad for an integration time of 3 microseconds has been measured, leading to an overall signal to noise ratio of 30 and a dynamic range...Go to contribution page
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Deyan Atanasov (Kirchhoff Insitute of Physics)PosterAddressing the needs for high-transaction, low-latency, high- selectivity trigger systems at LHC, a solution for a high- performance scalable trigger processing farm based on commodity computing nodes interconnected with a ring-based network is proposed. Running such a massive parallel system at input rates above megahertz requires flow control to prevent congestions at the receiver...Go to contribution page
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Mr Thierry Romanteau (LLR Ecole Polytechnique)PosterThe electromagnetic calorimeter (ECAL) of the CMS experiment is equipped with ~3000 front-end boards (FE) performing both trigger and data readout functions. Prior to their integration at CERN in the ECAL detectors the FE boards are tested using a dedicated test bench located in Laboratoire Leprince-Ringuet. This test bench, called XFEST, was designed and built for testing as much as...Go to contribution page
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Dr Costas Foudas (Imperial College)PosterA. Rose, C. Foudas, J. Jones and G. Hall Physics Department Imperial College London SW7 2BW, London UK. Investigations on the possibility of designing a First Level Tracking Trigger for CMS at the SLHC based on the data of the inner tracking detector are presented. As a model for the inner tracking detector we have used the current CMS pixel detector with the same pixel size and...Go to contribution page
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Mr Sachin Junnarkar (Brookhaven National Laboratory)PosterThe ATLAS muon spectrometer will employ Cathode Strip Chambers (CSC) to measure high momentum muons in the extreme forward regions [1]. The on-detector electronics for the ATLAS CSCs performs amplification, analog buffering, and digitization of the charge signals from individual cathode strips. We present production test architecture for on chamber electronics comprising of custom...Go to contribution page
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Mr Torsten Alt (Kirchhoff Institute of Physics)Programmable Logic and Embedded ProcessingPosterThe ALICE HLT-RORC, a FPGA based PCI card, will be the link between the front-end electronics of the detector and the Front-End processors in the High Level Trigger. Equipped with the new Xilinx Virtex4 LX40 FPGA a fast PCI 64/66 interface and up to two optical links the card will not only be able to inject the raw detector data into the memory of the Trigger farm, it also provides...Go to contribution page
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Dr Sorina Popescu (IFIN-HH/CERN)PosterIn view of the forthcoming magnetic field measurements (July-September 2005) of the Alice magnet system, a prototype for monitoring the magnetic field was build and tested in the laboratory and will be validated during the mapping of the magnetic fields. The total magnetic field volume to be measured comprises the L3 solenoid and Muon arm dipole magnets. Hall and NMR probes will be...Go to contribution page
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Mr De Oliveira
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Dr Leonid Efimov (Joint Institute for Nuclear Research (JINR))PosterFAD-a modular assembly of the fast (320 MHz input pulse BW at 20 Db gain factor) and portable (120x30 mm^2 PCB per 4-input unit) front-end electronic channels, each aggregating linear adders, amplifiers, LED type threshold discriminators and output ECL shapers, has been designed to implement primarily the ALICE TRD testing bench. An initial series of the FAD based modules is prepared to...Go to contribution page
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Dr Ivan Kisel (UNIVERSITY OF HEIDELBERG, KIRCHHOFF INSTITUTE OF PHYSICS)TriggeringPosterTypical central Au-Au collision in the CBM experiment (GSI, Germany) will produce up to 700 tracks in the inner tracker. Large track multiplicity together with presence of non-homogeneous magnetic field make reconstruction of events complicated. A cellular automaton method is used to reconstruct tracks in the inner tracker. The cellular automaton algorithm creates short tracklets in...Go to contribution page
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Dr Mark Raymond (Imperial College)Production, Testing, Quality Assurance and ReliabilityPosterThe APV25 is the front end readout chip for the CMS silicon microstrip tracker. Approximately 75,000 chips are required and the production phase is now complete. Each chip on every wafer is subjected to detailed probe testing to verify full functionality and performance, and only chips that pass all tests are selected for mounting on detector modules. Over several years more than 500...Go to contribution page
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Mr Christian Reichling (Kirchhoff Institut für Physik)Custom Integrated CircuitsPosterThe Quad Ported Memory (QPM) is the data memory for the four MIMD CPUs in the TRAP Chip. Which is part of the trigger system for the ALICE Transition Radiation Detector (TRD). The QPM has 1024 data words each data word consists of 39 bits (32 data bits, plus 7 hamming bits) and is quad ported - each CPU can access the memory, reading or writing completely independent of the CPUS,...Go to contribution page
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Mr Stefanos Dris (Imperial College and CERN)PosterThe maximum attainable data rate in a digital readout system based on the current CMS Tracker optical link components is investigated. Additional digital modulation and demodulation on either side of the current analog link would be required for implementation. The feasibility of such a conversion is explored in terms of performance that can be achieved and implementation complexity....Go to contribution page
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Ricardo Ramirez (U. of Texas, Arlington)PosterThe new TCAD tools for IC modeling allow the verification of the silicon circuit implementation from the fabrication stages to the final implementation circuits. Using such setup a study of the Minimum Ionizing Particle (MIP) has been carried on in order to optimize and predict behaviors of the Silicon Detectors used by High Energy Physics experiments. This paper shows the use of such...Go to contribution page
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Walter Rinaldi (Universita di Roma I "La Sapienza")PosterLHCb Muon Chambers (MWPC) testing will be carried out in a number of steps, and final characterization will be performed in a station detecting cosmic rays, with all the equipment in place. We have designed a Multiplexer board, which can reduce by more than a factor of four the number of channels to be acquired, using time multiplexing: signals are delayed with respect to each other by...Go to contribution page
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TrackingOralthis is my abstractGo to contribution page
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Dr Jose Torres (University of Valencia, Spain)PosterTileCal is a redundant data acquisition system. Two optical fibers carry the same data from front-end electronics to ROD system. This is necessary because of radiation phenomena could cause malfunctions inside front-end electronics, and bit and burst errors over data ready to be transmitted to ROD motherboard. Unfortunately, ROD card has only one input connector for each data, because...Go to contribution page
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Vladimir Gromov (NIKHEF)PosterA new all-MOS bandgap voltage reference circuit has been developed and implemented in a commercial 0.13-μm CMOS technology. The proposed circuit features dynamic-threshold MOS transistors (DTMOST's) and therefore well fits into the low supply-voltage range of the technology. Measured Vref is 425±15mV (chip-to-chip statistical spread) for 8 samples. The circuit runs at supply voltages...Go to contribution page
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Mr Stefan Koestner (CERN/University Zurich)PosterThe BEETLE frontend chip is a 128 channel radiation hard analog read-out chip using commercial 0.25µm CMOS technology designed by the ASIC lab in Heidelberg. The BEETLE is used at the LHCb experiment, currently under construction at the Large Hadron Collider at CERN. It operates at 40 MHz and saves events into a pipeline with a maximum latency of 160 clock cycles. We summarise here...Go to contribution page
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Dr Géza Székely (Institute of Nuclear Research (ATOMKI), Debrecen, PO BOX 51. Hungary H-4001)PosterFor the precise measurement of the positions of the barrel muon chambers in the CMS detector, a Position Monitoring System (PMS) has been developed at our institutes. The magnetic field, which has to be tolerated by the system, is 2 Tesla. The aim of this paper is to present and discuss the logical organisation, applied tools and methods of a subsystem of the PMS, which is dedicated to the...Go to contribution page
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Mr Herve Blampey (CERN)PosterThe read-out of the ATLAS TRT requires about 30000 digital links working at 40 Mbits/s. For cost reasons it was not possible to use fibre optics technology in the tracker volume of ATLAS. LVDS links using very thin twisted pair lins (36 AWG) have been implemented up to a point where a small number of optical Gbits links are used. Complex harnesses, including the small twisted pairs, the...Go to contribution page
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Dr Gloria Torralba (Kirchhoff Institute for Physics, University of Heidelberg, Germany)Custom Integrated CircuitsPosterThe device presented at this work is a switch designed for compensating the skew which affects parallel data signal transmissions and for providing fault tolerance in large scale scalable systems, for instance used in trigger farms for high energy physics experiments. The SWIFT chip (SWItch for Fault Tolerance)is part of a cluster built around commercially components which has been...Go to contribution page
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Dr Erica Polycarpo (Instituto de Fisica)PosterThis document describes the hardware and software of a Front-End Electronics Test (FEET) Station developed to test and characterize the LHCb Muon Front-End (FE) ASIC, which processes the signals generated by Multi-wire proportional chambers and GEM detectors. The CARIOCA (Cern And Rio Current-mode amplifier) is an 8-channel Amplifier, Shaper and Discriminator with Base Line Restoration...Go to contribution page
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Mr Rafael Nobrega (INFN sez Roma "La Sapienza" (and CBPF))PosterThis document describes hardware and software of a station developed to test the LHCb Muon Front-End Boards (FEBs) for MWPC and GEM chambers. Such boards are made up of two Amplifier, Shaper and Discriminator (ASD) ASICs and a read-out and control ASIC, accessible via I2C based data transfer protocol. Such station allows bench tests of front-end readout circuitry using the same...Go to contribution page
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Dr Davide Pinci (INFN-Sezione di Roma)PosterWithin the Framework of the CERN Control System Project, using PVSS as the main tool, we developed an instrument to manage of the Muon System of LHCb. Adjustment and monitoring of High and Low Voltage power supplies,on-line diagnostics and fine tuning of the Front-End read-out devices, data acquisition from the gas system and the monitoring of pressure and temperature of the...Go to contribution page
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Mr Nigel Anthony Smith (associate)OralThe LHCb VELO detector consists of two halves, each equipped with 21 sensor stations. Each station consists of a Carbon Fibre support and a double-sided hybrid module equipped with 32 Beetle readout chips and R and Phi measuring sensors. The modules are designed to operate in a vacuum, transfer 32 watts to the cooling system whilst maintaining the silicon at –7 degrees and provide...Go to contribution page
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Dr Tim Jones (University of Liverpool)PosterWith the completion of the assembly of silicon detector modules and their supporting structures, the focus of activity has moved to the production and operation of large assemblies of multiple modules. This involves the physical mounting of modules onto their supports, the connection of their services and the subsequent testing. This paper describes the assembly and test procedures for...Go to contribution page
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Mr Maurizio SabenePosterThe demonstrator of the reflective memory board for the communication between the third and the second level PCs of the SPARC accelerator control system is presented. The main building blocks of the reflective memory board are: a 32 bit x 66 MHz Master/Target PCI interface with DMA capabilities, a fiber optic full-duplex high-speed link and a 1 MByte Synchronous Static DPRAM. The...Go to contribution page
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Mr Mikhail Matveev (Rice University)PosterWe report on the design and development of two electronics boards for the Endcap Muon Cathode Strip Chamber detector at CMS. One, the Muon Port Card, performs sorting “3 best patterns out of 18” and another one, the Muon Sorter, performs sorting “4 best patterns out of 36”. The selected output patterns are sent to a higher level of the trigger system in a ranked order. Both boards are...Go to contribution page
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Mr Jose Maria Castelo (Instituto de Fisica Corpuscular (IFIC) UV-CSIC)OralThe Tilecal Read Out System (ROD) must be able to receive the calorimeter data filtered by the first level trigger, process them, and send them to the ATLAS generaldata acquisition system (TDAQ), where the level 2 trigger decision will be taken.Therefore the ROD is placed between level 1 and 2 trigger levels. The ROD will process in real time the discrete samples of each calorimeter...Go to contribution page
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