11th Workshop on Electronics for LHC and future Experiments

Session

Plenary session P8

P8

16 Sept 2005, 09:00

Heidelberg

128. Implementing Artificial Neural Networks in Mixed-Mode VLSI

Prof. Joannes Schemmel (Kirchhoff Institut fuer Physik / Electronic Vision(s))

16/09/2005, 09:00

Oral

This talk presents different VLSI models of artificial neural networks ranging from abstract ones using binary neurons to biologically inspired pulse-coupled systems. Circuit examples demonstrating common design principles for optimizing area usage and network speed are shown. The usage of digital communication protocols allows the parallelization of the analog network cores to...

81. Recent Progress in Field Programmable Gate Arrays

Dr Peter ALFKE (Xilinx, Inc. San Jose, CA, USA)

16/09/2005, 09:45

Oral

In step with Moore’s Law, FPGAs are continuing their rapid progress. IC technology makes circuits smaller and faster, while 300 mm wafers with low defect density reduce the cost. Innovative chip structures support adaptation to conflicting user demands, and combine with flip-chip packaging to improve the electrical characteristics. This paper describes several new or enhanced...

47. FPGA Dynamic Reconfiguration in ALICE and beyond

Mr Gerd Troeger (Kirchoff-Institut fuer Physik, Universitaet Heidelberg)

16/09/2005, 10:10

Data Acquisition and Controls

Oral

Using the FPGA Virtual File System for Dynamic Reconfiguration of FPGAs, we have been investigating improvements to various aspects and components of the ALICE electronics. In this paper, we will briefly summarize the results from our work on improving the radiation tolerance of FPGA-based experiment electronics, followed by a deeper coverage of our more recent work on using the File...