Speaker
Yasuo Arai
(High Energy Accelerator Research Organization (KEK))
Description
We have been developing new monolithic radiation image detectors using a Silicon-On-Insulator (SOI) technology. The SOI wafer has both a thin low-resistivity Si and a thick, high-resistivity Si, which are bonded by an oxide layer. Radiation sensors with p-n junctions are created in the high-resistivity Si, and the output signals are directly connected to CMOS circuits fabricated in the thin Si layer. Since there is no mechanical bump bonding in the SOI pixel, it is possible to develop high-resolution, low-material, and intelligent pixel detectors. Two types of prototype pixel detectors, one integration-type and the other counting-type, are being developed and tested. We confirmed good sensitivity for light, charged particles and X-rays for these detectors.
We have also developing vertical (3D) integration technique which bonds two SOI wafers by u-bump bonding of 5 um pitch. First test chips are available before the end of 2009. Our SOI pixel process is open for academic sector, and we are operating regular Multi Project Wafer (MPW) runs. We have several MPW users including foreign laboratories and universities.
Summary (Additional text describing your work. Can be pasted here or give an URL to a PDF document):
http://rd.kek.jp/project/soi/documents/1002Vienna_summary_arai.pdf
Primary author
Yasuo Arai
(High Energy Accelerator Research Organization (KEK))
