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13–14 Sept 2016
CERN
Europe/Zurich timezone
There is a live webcast for this event.

FPGAs for next gen DAQ and Computing systems at CERN

14 Sept 2016, 15:00
20m
513/1-024 (CERN)

513/1-024

CERN

50
Show room on map

Speaker

Srikanth Sridharan (CERN)

Description

The need for FPGAs in DAQ is a given, but newer systems needed to be designed to meet the substantial increase in data rate and the challenges that it brings. FPGAs are also power efficient computing devices. So the work also looks at accelerating HEP algorithms and integration of FPGAs with CPUs taking advantage of programming models like OpenCL. Other explorations involved using OpenCL to model a DAQ system.

Presentation materials