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RD-53 Conference Talks (Public)

TWEPP2017, FE65-P2: a Pixel Prototype Readout Chip in 65nm Technology for HL-LHC Upgrades

Name: TWEPP2017, FE65-P2: a Pixel Prototype Readout Chip in 65nm Technology for HL-LHC Upgrades
Start: 2017-09-14T14:00:00+02:00
End: 2017-09-14T16:00:00+02:00
Location: No location set

by Timon Heim (Lawrence Berkeley National Lab. (US))

Thursday 14 Sept 2017, 14:00 → 16:00 Europe/Zurich