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10–16 Jun 2018
Dalhousie University
America/Halifax timezone
Welcome to the 2018 CAP Congress Program website! / Bienvenue au siteweb du programme du Congrès de l'ACP 2018!

Developing ITk Front-End Silicon-Strips Readout ASIC Testing Capability

13 Jun 2018, 14:15
15m
McCain 2016 (cap. 36) (Dalhousie University)

McCain 2016 (cap. 36)

Dalhousie University

Oral (Non-Student) / Orale (non-étudiant(e)) Applied Physics and Instrumentation / Physique appliquée et de l'instrumentation (DAPI / DPAI) W3-7 Applied Physics Instrumentation (DAPI) | Instrumentation de physique appliquée (DPAI)

Speaker

James Michael Botte (Carleton University (CA))

Description

Carleton University has a long history of involvement in detector design, testing, and construction for experiments at CERN including the original ATLAS detector at the LHC (Forward Calorimeter) and the New Small Wheel to be installed during LS1 (sTGC). In the past four years, we have developed the necessary capabilities and infrastructure to participate in the inner tracker upgrade needed for the High Luminosity LHC (ITk). While the Department of Physics at Carleton had expertise with numerous detector and readout technologies, the capability to characterize and test unpackaged Application Specific Integrated Circuits (ASICs) did not exist. Since then, with the support of professionals at DESY, RAL, and CERN; the Department of Electronics at Carleton; and partnering with two local companies in Ottawa, Canada, we can now characterize and dice a wafer of the ITk custom front-end silicon-strips readout ASICs, and are being asked to take ever larger roles in testing and characterizing the components to be used in the ITk detector. Through the expertise developed, Carleton can now participate in this and future silicon-based detector development and testing, including any custom chips required for readout and communication, which opens up exciting new opportunities for students and faculty, and builds the foundations needed to do research and development with these leading-edge technologies. This presentation will provide an overview of our work with the custom front-end silicon-strips readout chip (ABC130), describe the partnerships we have formed in developing these capabilities, and will show preliminary results of our characterization and dicing of these ITk ASICs.

Primary author

James Michael Botte (Carleton University (CA))

Presentation materials