24–29 May 2020 Postponed
America/Vancouver timezone

Development of the front-end electronics for Hyper-Kamiokande

26 May 2020, 17:12
18m
Parallel session talk Readout: Front-end electronics Readout: Front-end electronics

Description

The Hyper-Kamiokande is a next-generation Water Cherenkov detector, of 68 m diameter and 71 m height, for neutrinos physics and proton decay search. We plan to install the front-end electronics (FEEs) under the water and near the PMTs to collect the PMT’s signals with less deterioration in the large detector, and then connect electronics to downstream DAQ with optical fibers. Key design priorities include high reliability and redundancy since we cannot access the FEEs after the installation. We are developing the digitizers using QTC and TDC implemented on a field-programmable gate array (FPGA), a timing system giving synchronization among all the FEEs, etc. The system should have sub-ns timing resolution to maintain the timing resolution provided by the PMTs. In this study, we implemented a prototype on FPGAs and confirmed that the digitization performance is promising in the feasibility test. We will report the status of the latest R&D.

Author

Shota Izumiyama (Tokyo Institute of Technology)

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