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    Adhoc BI-TB for LHC DC BCT performance and electronics

    → Europe/Zurich
    CERN

    CERN
    Description

    https://cern.zoom.us/j/95505784430?pwd=UWswZ2hvRGlRc3NnTmxYTTBGRDZkQT09

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    Instrument performance (Arda)

    • Laboratory instrumentation and tools
    • Batch (beam filling pattern) dependency
    • Python based analysis taking logging data from NXCALS
    • Further details to be analysed (measurement error as function of intensity)

    Electronics and related software (Patrick)

    • Reminder of complete system (2 detectors per beam), 16 and 24 bit ADC systems in SX4
    • Full scale is 5E14 charges
    • Full lab system considered critical for further work
    • Need to modify analogue electronics for HL-LHC intensities
    • Possible option to install 24-bit ADC on surface (split analogue signal in SX4)
      • Radiation hardness of 24-bit ADC is unclear
    • The future of 16-bit software with aux signals needs to be decided
    • The batch intensity (in 25nsec bunches) most critical for DC BCT performance
      • Unclear by when the now nominal ~2E11 charges will be exceeded (HL-LHC preparation)

    Software (BCTDCLHC2) changes since 2018 (Lars)

    • Upgrade Linux to L867 with related FESA3 version
    • Software driven acquisition based on 10Hz LTIM event
    • Based on functional specifications with request for data at 50Hz (20msec 'scans')
    • VD80 sometimes returns fewer than expected data (see slide 2)
    • Software wrapper completely rewritten to take into account the missing scans (averages correct)
    • Work remaining to make complete FESA3 server with calibration to be estimated

    Follow-up:

    • Test possibility to install 24-bit ADC in SX4 (splitting analogue signals) (Patrick / Sebastien)
    • Provide full-scale test bench in 866 lab (Patrick / Sebastien)
    • Organise a follow-up meeting in January 2021 (Thibaut/Diogo)
    • Contact Jorg Wenninger to get information about bunch intensity (Patrick)
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