21–23 Jun 2021
Europe/Zurich timezone

Readout system and testbeam results of the RD50 MPW2 HV-CMOS pixel chip

23 Jun 2021, 17:40
25m

Speaker

Patrick Sieberer (Austrian Academy of Sciences (AT))

Description

The RD50-CMOS group aims to design and study High Voltage CMOS (HV-CMOS) chips for use in a high radiation environment. Currently, measurements are performed on RD50-MPW2 chip, the second prototype developed by this group.
The active matrix of the prototype consists of 8x8 pixels with analog frontend. Details of the analog frontend and simulations have been already published earlier. Standard tests on passive test-structures have been performed as well and will be briefly mentioned.
This talk focusses on the digital, Caribou based readout system of the active matrix and results of the first small testbeams. Relevant aspects of hardware, firmware and software are introduced, always focusing on the operation of the chip in combination with a tracking telescope to measure hit efficiency.

Author

Patrick Sieberer (Austrian Academy of Sciences (AT))

Presentation materials