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Yasuo Arai (High Energy Accelerator Research Organization (KEK))05/09/2007, 09:00OralWe are evaluating SOI (Silicon-On-Insulator) technology for radiation-hard electronics and monolithic radiation sensor applications. The process we used is a 0.15um CMOS, fully-depleted SOI technology developed by OKI Electronics Industry Co. Ltd. This SOI device has two Si layers; one is a thick substrate (handle wafer) which is Czochralski high-resistivity silicon, and another is SOI layer...Go to contribution page
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Mr Robert Wieland05/09/2007, 09:45Oral3D-Integration is a promising technology towards higher interconnect densities and shorter wiring lengths between multiple chip stacks, thus achieving a very high performance level combined with low power consumption. This technology also offers the possibility to build up systems with high complexity by combining devices of different technologies. Ultra thin silicon is the base of this...Go to contribution page
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