An ATCA Processor for Level-1 Trigger Primitive Generation and Readout of the CMS Barrel Muon Detectors

7 Apr 2023, 18:00
20m
Main Auditorium (Conference Centre “Karolos Papoulias”)

Main Auditorium

Conference Centre “Karolos Papoulias”

Speaker

Ioannis Bestintzanos (University of Ioannina (GR))

Description

An ATCA processor was designed to instrument the first layer of the CMS Barrel Muon Trigger. The processor receives and processes DT and RPC data and produces muon track segments. Furthermore, it provides readout for the DT detectors. The ATCA processor is based on a Xilinx XCVU13P FPGA, it receives data via 10 Gbps optical links and transmits track segments via 25 Gbps optical links. The processor is instrumented with a Zynq Ultrascale+ SoM connected with the FPGA through high speed links and an SSD which provides for enhanced monitoring and control information. The design of the board and results on its performance are presented, as well as progress on infrastructure developments.

Primary author

Ioannis Bestintzanos (University of Ioannina (GR))

Presentation materials