Speaker
Description
The Large Hadron Collider (LHC) will undergo a major “High Luminosity” upgrade with the goal of delivering a peak instantaneous luminosity of about $\mathrm{5-7.5 \times 10^{34}cm^{-2}s^{-1}}$ by 2029. In order for the CMS experiment to cope with the higher radiation levels and data rates, the current CMS Silicon Tracker will be replaced. The upgraded Outer Tracker will introduce a new module concept, made of two vertically stacked silicon sensors, which will exploit the strong magnetic field inside the CMS detector to perform an on-board $\mathrm{p_{T}}$ discrimination, selecting high $\mathrm{p_{T}}$ particles locally and sending the corresponding information to the CMS Level-1 triggering system.
This talk will focus on one of the two foreseen designs, namely the silicon Pixel-Strip (PS) module. The module is made of a $\mathrm{10 \times 5 cm^{2}}$ strip sensor, with $\mathrm{2.5 cm}$ long strips and $\mathrm{100\mu }$m pitch, stacked on top of a macro pixel sensor with $\mathrm{1400 \times 100 \mu m}$ macro pixels bump-bonded to dedicated macro pixel ASICs. The latter are of particular importance as they implement the logic of on-board $\mathrm{p_{T}}$ discrimination. The sensor stack is surrounded by peripheral front-end, readout and power hybrids. The front-end hybrids are in charge of strip sensor readout and data concentration. The readout hybrid handles the control of the front-end ASICs and the bi-directional optical data communication with the back-end system. Finally, the power hybrid ensures power distribution to all the front-end electronic components.
After an introduction to the concept of $\mathrm{p_{T}}$ discrimination and to the design of the PS module, the talk will mainly focus on qualification studies performed at the DESY II Test Beam Facility. The presented results will cover cluster size and resolution studies, detection efficiencies and most importantly the on-board $\mathrm{p_{T}}$ discrimination performance.
