10–13 Oct 2023
Toulouse
Europe/Zurich timezone

A real-time demonstrator of track reconstruction with FPGAs at LHCb

Not scheduled
20m
Auditorium (Le Village)

Auditorium

Le Village

Speaker

Francesco Terzuoli (Università di Siena & INFN Pisa (IT))

Description

The upgraded LHCb detector has started its Run 3 of data taking in 2022, with a completely overhauled DAQ system, reading out and processing the full detector data at every LHC bunch crossing (30 MHz average rate). At the same, an intense R&D activity is taking place, with the aim of further improving the real-time data processing performance of LHCb, in view of a further luminosity upgrade of the experiment (“Upgrade II”).
In this work, we describe the experience gained with a prototype device for a 30 MHz real-time tracking in the LHCb VELO detector, implemented in state-of-art PCIe-hosted FPGA cards interconnected by fast optical links.
The system is capable of processing live LHCb data opportunistically during physics data taking, thanks to a dedicated testbed facility fed by the experiment monitoring system. We describe, amongst other things, the system used to organize and optimize the high-speed distribution of data to the components, and the synchronization with the most updated alignment constants to be used in track reconstruction.

Primary authors

Andrea Contu (INFN) Federico Lazzari (Universita di Pisa & INFN Pisa (IT)) Francesco Terzuoli (Università di Siena & INFN Pisa (IT)) Giovanni Bassi (SNS & INFN Pisa (IT)) Giovanni Punzi (Universita & INFN Pisa (IT)) Giulia Tuci (Heidelberg University (DE)) Michael J. Morello (SNS and INFN-Pisa (IT)) Riccardo Fantechi (INFN - Sezione di Pisa) Sofia Kotriakhova (Universita e INFN, Ferrara (IT)) Wander Baldini (Universita e INFN, Ferrara (IT))

Presentation materials