Speaker
Yoshinobu Unno
(High Energy Accelerator Research Organization (JP))
Description
We have been developing novel n$^{+}$-in-p pixel and strip sensors that are highly radiation-tolerant, having a ``planar" electrode geometry, utilize p-type silicon wafers, and being read out from highly doped n$^{+}$ implants. Our goal of the radiation level is in the range of $10^{15}$ and up to 2 $\times$ 10$^{16}$ 1-MeV-neutron-equivalent (n$_{\rm eq}$)/cm$^{2}$ of the particle fluence, approximately 30 and up to 600 Mrad of the dose in Silicon, in the strip and the pixel sensors, respectively, e.g., in the high-luminosity large hadron collider (HL-LHC).
The n$^{+}$-in-p silicon sensors have the following properties: the p-type silicon wafer does not change type after irradiation (no type-inversion); read-out is from the junction side (n$^{+}$) in all cases; and the collected carrier is the electron. These properties lead to a number of benefits: the lithographic processes is only required on a single side, which leads to lower production costs; partially-depleted operation is allowed, which is crucial after heavy irradiation in which the full-depletion voltage becomes higher than the operation voltage; and stronger and faster signals are induced by the carrier in the higher electric field in the junction side, thus leading to less charge-trapping.
For the sensors, the critical issues include operation at very high voltage, e.g., 1000 V, implementation of isolation structure and bias structures, and reduction of material. The operation voltage up to 1000\,V, is to cope with the increasing full-depletion voltage caused by radiation damage. An isolation structure is to isolate the n$^{+}$ implants from being connected by the conductive layer of attracted electrons in the surface of silicon, caused by the built-in and radiation-induced positive charge-up in the interface of the silicon and the surface oxide. A bias structure in the case of the pixel sensors is to provide a high voltage to all pixel implants for testing without connecting the implants to the read-out chip. These structures are to be designed not to introduce breakdown in leakage current, against the high electric field caused by the high operation voltage. The insensitive area caused by the structures are to be the minimum. The sensors are as thin as possible in order to reduce the multiple coulomb scattering to the traversing charged particles. The novel n(+)-in-p pixel sensors were made using a combinations of the bias structure of punch-through or polysilicon resistor, the isolation structure of p-stop or p-spray, and the thickness of 320 $\mu$m or 150 $\mu$m. The strip sensors and associated test structures were made of the polysilicon resistor and the p-stop isolation structures.
For the pixel modules, the critical issues include the need to bump bond with lead-free bumps and prevention of high voltage sparking. Usage of lead-free Tin-Silver (SnAg) solder bumps has became the industry standard. We have been tuning the lead-free bump-bonding technique in Japan. The pixel modules, the pixel sensors being connected to the readout chips, were fabricated by the established vendor in Europe and by the developing vendor in Japan. The high voltage (HV) (edge of the sensor) can, in the case of n$^{+}$-in-p devices, be the voltage of the backplane and the ground (GND) (read-out chip) can be as close as 20 to 30 $\mu$m. The HV protection has been realized with encapsulating the edges.
The strip sensors and test structures were irradiated using 70 MeV protons to particle fluences of 5x10^12 to 1x10^15, and the pixel modules using 23 MeV protons to 5x10^15 1-MeV neq/cm^2. The non-irradiated and irradiated pixel and strip sensors were evaluated in the laboratory measurements and by using charged particle beams.
In evaluating the performance of the irradiated sensors, we have observed a number of effect that we would like to understand: decreased efficiency under the bias rail, decreased potential of the p-stop implant between the n(+) strips, decreased active area in the strip end, and increased onset voltage in the punch-through protection structures. We discuss the common source that may have caused the above observations.
Primary author
Yoshinobu Unno
(High Energy Accelerator Research Organization (JP))
