Speaker
Description
The CASSIA Project (CMOS Active SenSor with Internal Amplification) aims to develop monolithic MAPS with internal signal gain and low noise in a widely used CMOS imaging process towards a broad range of applications. The current developments are based on the Tower Semiconductor CIS 180nm technology in view of later portability towards other processes including smaller node size process (e.g. 65nm).
Sensors with internal gain can provide several advantages for future monolithic CMOS sensors:
• Considerably higher input signal amplitude enabling simplification of in-pixel electronics (e.g. for low-power electronics),
• Superior timing resolution in fine-pitch MAPS for future 4D tracking applications or time-tagging applications,
• Improved signal-to-noise ratio for operation in high radiation environment.
The CASSIA sensor targets the optimization of different pixel designs to operate in low-gain amplification (linear mode), as well as strong amplification (Geiger mode) at low dark-count-rates. The pixel implantation design shall be optimized for charge collection, full efficiency, different gain-layer designs including gain termination structures. CASSIA sensor shall also include developments of required in-pixel electronics e.g. for low-power or timing-optimized signal amplification, biasing and quenching circuits depending on operation mode, first level digitization, etc.). Submissions are planned in dedicated MPWs or shared common engineering runs depending on availability.
| Type of presentation (in-person/online) | in-person presentation |
|---|---|
| Type of presentation (scientific results or project proposal) | project proposal for future work |
