Speaker
Description
In the past decade, Electron Cryo-Microscopy (cryoEM) has developed into a popular technique for biological molecular structure determination, driven largely by the rapid development of increasingly capable direct electron detectors. Traditionally, cryoEM has been performed on 300 keV transmission electron microscopes, which are costly to acquire and operate, and consequently out of reach for many potential users. In recent years, there has been interest in conducting cryoEM in 100 keV transmission electron microscopes, which are as much as an order of magnitude less expensive to procure and operate. Additionally, studies have indicated that cryoEM at 100 keV may permit the extraction of significantly more structural information from a sample, as by reducing the electron energy, the sample radiation damage is reduced.
This interest has been hampered by the absence of sensors suitable for operation at 100 keV, with most optimised for operation at 300 keV. The nature of cryoEM presents the challenging requirement for such a sensor to simultaneously possess a large sensitive area (>10cm diagonal), high frame rate operation for discrete electron counting operation and high detector quantum efficiency.
At the Science and Technology Facilities Council we have extensive experience developing direct electron detectors for electron microscopy and have been developing a collection of reusable ‘building blocks’, notably including a sigma-delta ADC and 4.3 Gbit/s serialiser, for the development of image sensors in the Tower Semiconductor’s, 2D stitching capable, 180nm CMOS image sensor process. The capability to deliver a single device, filling an 8” wafer, is ideal to fulfil the large detector area requirements of 100 keV cryoEM.
We present the outcome of that development: ‘C100’, a wafer scale, 4-megapixel, direct electron detection sensor, capable of operating at frame rates in excess of 2500 FPS. The >120cm2 active area of the sensor consists of a 2048-by-2048 array of 54-micrometre pitch radiation hardened 3T pixels. These pixels are then read out and digitised through 16576 sigma-delta 13-bit ADCs operating at up to 640k samples-per-second (design rate of 1M samples-per-second, but is limited here by readout rate). The converted data is shifted out of the ADCs into 34 4.3 Gbit/s serialisers, implementing the AMD Aurora 64b/66b protocol, handling a total system bandwidth in excess of 140 Gbit/s. Off-chip these serialisers are connected to Samtec FireFlyTM transceivers for optical transmission to the data acquisition system.
While optimised and appropriately radiation hardened for direct electron detection, C100’s pixels are also suitable for the detection of light and charged particles.
Here we intend to present the high-level design and architecture of C100, along with the challenges we overcame during development and the results of device characterisation. Additionally, we plan to outline our next steps at 180nm, furthering the development of our reusable ‘building blocks’, and our plans to take this forward for our 65nm development program.
| Workshop topics | Detector systems |
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