7–9 Oct 2024
Swiss National Supercomputing Center / CSCS
Europe/Zurich timezone

Development of a low-power and high speed pre-amplifying integrated circuit: The FANATIC ASIC

8 Oct 2024, 15:05
20m
CSCS Conference Room Ground Floor (E4) (Swiss National Supercomputing Center / CSCS)

CSCS Conference Room Ground Floor (E4)

Swiss National Supercomputing Center / CSCS

Via Trevano 131, 6900

Speaker

Luca Giangrande (Universite de Geneve (CH))

Presentation materials