Speaker
Description
In the context of the ALICE Inner Tracking System upgrade (ITS3) project and the CERN EP R&D, a new large area Monolithic Active Pixel Sensor (MAPS), based on stitching, is being developed in the Tower Partner Semiconductor (TPS) Co. 65 nm CMOS Image Sensor (ISC) process.
Different pixel test structures (TS) were designed to validate the sensor technology through an extensive characterization both with laboratory and in-beam measurements.
This work will focus on the Analogue Pixel Test Structure equipped with a fast OPAMP buffer to explore the sensor timing performance and the signal formation process. Every TS has three different sensor versions: standard, modified and modified with gap, respectively with an increased charge collection speed.
Lab measurements with a monochromatic X-ray source were made to characterize the test structures which led to the conclusion that the modified with gap sensors presented a slower charge collection tail when compared to the modified design. In order to understand these experimental data, a model of the charge collection process using a combination of TCAD and AllPix2 was developed.
This contribution will present the simulation approach and the results obtained regarding the charge collection mechanism that explain the presence of the slower tail in the modified with gap sensor design.
| Will the talk be given in person or remotely? | In person |
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