Speaker
Dr
Krzysztof Korcyl
(Polish Academy of Sciences (PL))
Description
A novel architecture is being proposed for the data acquisition and trigger
system for PANDA experiment at the HESR facility at FAIR/GSI. The
experiment will run without the hardware trigger signal and use timestamps
to correlate detector data from a given time window. The broad physics
program in combination with high rate of 2 10^7 interactions require very
selective filtering algorithms which access information from
almost all detectors. Therefore the effective filtering will happen
later than it used to in today's systems ie after the event building.
To assess that, the complete architecture will be built of two stages: the data
concentrator stage providing event building and the rate reduction stage. For the
former stage, which allows to switch 100 GB/s of event fragments to perform
event building, we propose two layers of ATCA crates filled with
compute nodes - modules designed at University of Giessen for trigger
and data acquisition systems. Each board is equipped with 5 Virtex4 FX60 FPGAs
and high bandwidth connectivity is provided by four Gbit Ethernet links
and 8 additional optical links connected to RocketIO ports.
Using the SystemC as the modeling platform we designed simplified models of
the components of the architecture and demonstrated expected throughput. We
also show impact of some architectural choices and key parameters on the
architecture's performance.
Summary
Key words: SystemC, modeling real-time systems, data acquisition and trigger
systems
Primary author
Dr
Krzysztof Korcyl
(Polish Academy of Sciences (PL))
Co-authors
Igor Konorov
(Technische Universitat Munchen)
Dr
Lars Schmitt
(GSI Darmstadt)
Prof.
Wolfgang Kuehn
(Justus-Liebig-Universitaet Giessen (DE))
