Speaker
Description
This contribution presents a co-simulation methodology that unifies sensor and front-end circuit modelling for pixel detectors. Traditional simplified signal models often fail to represent realistic particle-induced transients, leading to discrepancies between design-time assumptions and actual performance. The simulation chain enables simulation of a large number of realistic events, incorporating detailed signal shapes derived from TCAD and Monte-Carlo simulations into the analogue circuit simulation framework. This approach allows pre-silicon estimation of the influence of certain design choices on key metrics such as detection efficiency and timing performance, helping both front-end optimization and measurement interpretation of pixel sensors.
Summary (500 words)
In the design and analysis of solid-state particle detectors, the sensor is often modelled as a simple parallel combination of a capacitance (representing the diode junction) and a fixed-duration triangular current pulse (mimicking a particle hit). While this abstraction is sufficient for many applications, it shows limitations for example for monolithic active pixel sensors implemented in TPSCo 65nm technology, where sensor capacitance is typically in the order of a femto farad and circuit-sensor interactions are tightly coupled due to close physical integration.
The common assumption of a fixed-duration current pulse at the input of the front end during the design stage introduces potential mismatches between the simulated front-end performance and the one obtained with actual signal from the sensor. This can lead to suboptimal design optimisation in terms of charge collection efficiency or timing resolution. In this work, we present a co-simulation methodology that integrates the sensor’s response into the front-end electronics simulation. Using a combination of TCAD device models, Monte Carlo event generators and analogue circuit simulators, the simulation chain allows designers to simulate realistic signal shapes and evaluate circuit behaviour under high-statistics conditions (>100 000 events).
This approach is not only useful during design but also aids in interpreting characterisation results by capturing stochastic variations due to charge deposition. For monolithic sensor this method already proved able to qualitatively reproduce measurement involving a combination of sensor and front-end effects. It confirmed that the timing degradation observed in some region of the pixel was indeed related to an electric field perturbation in the sensor caused by a specific n-well layout of the circuit. Most importantly, this method now enables the evaluation of such effect fully in simulation, allowing to prototype mitigation strategies.
One of the key implementation challenges is computational efficiency. To overcome this, we developed script-driven simulation orchestration and result aggregation, allowing processing of hundreds of thousands of events in under 24 hours on a modest workstation, making the approach usable for iterative design cycles.
In conclusion, this contribution presents a practical solution for integrating sensor physics into front-end ASIC design workflows, offering pre-silicon estimation of the influence of certain design choices on key metrics such as detection efficiency and timing performance. The methodology is particularly relevant for sensor developments in advanced CMOS nodes where traditional abstractions fail to explain some results, as illustrated by examples from a 65nm monolithic technology. This work has strong implications for both performance-driven detector development and measurement result analysis, making it relevant for people involved in front end design as well as detector testing and characterisation.
