6–10 Oct 2025
Rethymno, Crete, Greece
Europe/Athens timezone

Design of a 25 Gb/s High-Voltage Radiation-Tolerant Driver for SiPh Modulators in 28 nm CMOS Technology

7 Oct 2025, 13:40
1h 40m
Athina hall

Athina hall

Poster ASIC Poster 1

Speaker

Gabriele Ciarpi (CERN)

Description

This work presents the design of a radiation-tolerant driver for high-speed electro-optical transmitters. The driver delivers 25 Gb/s modulation signals with a 3.6 V swing, bridging the voltage gap between 28 nm CMOS technology (rated for 0.9 V) and silicon-photonics devices. A multi-voltage domain approach allows operation from a single supply, optimizing power efficiency and minimizing area. This driver enables achieving the 100 Gb/s downlink target on a single fiber, realized by combining four 25 Gb/s drivers in parallel, using wavelength division multiplexing, for high-speed communication systems in future experiments.

Summary (500 words)

In CERN experiments, particle collisions generate events that are digitized by various detectors, with the resulting data transmitted via optical fibers to backend data acquisition systems. Each experiment is equipped with tens of thousands of fibers, resulting in an aggregate bandwidth of several tens of terabits per second. Future high-energy physics experiments may demand optical readout systems with greater bandwidth, improved radiation tolerance, lower power consumption, and minimized mass.

The combination of 28 nm CMOS technology with silicon-photonics (SiPh) has been identified as a key enabler for future radiation-tolerant optical transceivers. Despite their individual advantages in radiation tolerance and high-speed performance, integrating the two technologies remains a complex task. SiPh devices suitable for light modulation at Gb/s rates, such as microring ($\mu$Ring) modulators, exhibit electro-optical efficiency dependent on the applied electrical modulation voltage. Typically, voltages above 2.5 V are required to achieve a satisfactory extinction ratio and ensure adequate optical performance.

However, the radiation hardness of the chosen CMOS technology relies on the use of thin-oxide core devices, rated for 0.9 V, creating a significant gap between the CMOS driver and the photonic modulator. Bridging this gap requires dedicated circuit-level solutions, developed within the constraints of high-speed data transmission and radiation-tolerant design.

In this contribution, we present the design of a radiation-tolerant driver capable of delivering 25 Gb/s modulation signals with a nominal voltage swing of 3.6 V, equivalent to four times the core device VDD. The driver is designed to exclusively operate the p-n junction of the $\mu$Ring fully in reverse bias, thereby enhancing both modulation efficiency and bandwidth. It serves as a key enabler for realizing a 100 Gb/s downlink on a single fiber via wavelength division multiplexing.

A multi-voltage domain approach is employed to handle the high output swing using only low-voltage transistors. Several circuit techniques are employed to ensure reliable operation under high-voltage conditions while simultaneously maintaining high-speed performance and low power consumption.

Although such a driver would typically require multiple external power supply voltages, careful synchronization of its internal stages and efficient charge sharing allow the entire system to operate with only a 3.6 V supply in addition to the 0.9 V core supply. This significantly simplifies power distribution, reduces overall power consumption, minimizes silicon area, and limits the number of required power pads.

The driver is segmented into four slices to allow for adjustment of the output driving strength. This design is beneficial for compensating Process-Voltage-Temperature variations, adapting to different loads, and improving control over power consumption.

The high-speed driver is typically one of the most power-hungry components in a communication chip, and the quality of the power delivery system directly impacts its performance. Therefore, every aspect of the driver, from ESD protections to the individual buffers, has been carefully optimized to minimize power consumption, thereby reducing the demands on the power delivery system.

To the best of the authors' knowledge, this driver represents the fastest design with the highest output swing ever achieved in 28 nm technology, both for radiation-tolerant and non-radiation environments.

Authors

Presentation materials