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Description
This paper presents performance of readout electronics for the ATLAS muon-chamber (MDT) to detect and measure the charge resulting from proton-proton collisions. The design emphasizes speed, robustness, and efficiency in area and power. It achieves a peaking time of 15 ns with 60-pF detector capacitance and 4 ns without it. The circuit demonstrates linear sensitivity of 1 mV/fC at the charge-sensitive preamplifier (CSP) output and 8 mV/fC at the shaper output. Charge information in the range of 5–100 fC is extracted via time-over-threshold (ToT) decoding. Implemented in 65 nm CMOS technology, the design operates at a 1.2 V supply voltage.
Summary (500 words)
The complete architecture comprises four channels (Fig. 5), each beginning with a charge-sensitive preamplifier (CSP) shown in Fig. 1 that performs charge-to-voltage conversion. The CSP output is processed by the shaping stage, which conditions the signal and enables rapid, stable baseline restoration. Two commonly used techniques in readout electronics are unipolar and bipolar shaping [1]. Due to the complexity of unipolar shaping—such as active baseline restoration, significant discriminator hysteresis, and programmable time constants [1]—a bipolar shaping approach is adopted. A two-stage filter performs bipolar shaping, amplifying and transforming the signal into a bipolar pulse with a fast baseline recovery time. This signal is then processed by a discriminator, which compares it against a programmable threshold from 0 to 256 mV. The discriminator generates a time-over-threshold (ToT) pulse that encodes charge: the leading edge indicates arrival time, while the pulse width corresponds to charge magnitude.
Compared to conventional electronics [2]–[4], the proposed design features minimal architecture with a single mode of operation, i.e., ToT. It operates at a reduced supply voltage of 1.2 V and is implemented in long-term sustainable technology. The addition of a monitor buffer allows signal observation for debugging and can be disabled at runtime.
The readout electronic chip is soldered onto a PCB, as shown in Fig. 6. During measurements, the design is validated for input charges ranging from 5 fC to 100 fC. For diagnostics and observing signal evolution, a test-point buffer is connected to the output of the CSP, as illustrated in Fig. 1. Fig. 2 shows the transient response of the CSP. As input charge increases from 5 fC to 100 fC, the output voltage exhibits a highly linear response from 5 mV to 100 mV. This corresponds to a measured sensitivity of ~1 mV/fC, demonstrating the CSP’s accurate charge-to-voltage conversion over the specified dynamic range.
Fig. 3 presents post-layout simulation results of the analog front-end, showing a bipolar output ranging from 40 mV to 800 mV for input charges between 5 fC and 100 fC. The baseline recovery time (BLR) for maximum input charge is 320 ns. As the input charge increases, the width of the resulting ToT pulse varies accordingly (Fig. 4). As illustrated in Fig. 1, the ToT pulse encodes both the arrival time and magnitude of the detected charge generated by the proton-proton collision.
In conclusion, a 4-channel readout chip for MDT ATLAS detectors and its measurement results are presented. The design is implemented in TSMC 65 nm CMOS technology, targeting power- and area-efficient operation while maintaining performance parameters required by the ATLAS MDT detectors [2]–[4]. Through architectural optimizations and use of a scaled-down technology node, the proposed channel demonstrates a 57.4% reduction in power consumption and occupies only 58.75% of the silicon area compared to the previous implementation [3]. Notably, this enhancement is achieved without compromising key performance metrics, including signal fidelity, peaking time, and input dynamic range.
