Speaker
Description
Abstract (100 words)
The ETROC2 is the first full size full functionality prototype design fully compatible with the final chip specifications for CMS ETL. The ETROC2 chips have been extensively tested, and the results have been presented at last TWEPP. We will present here new results including the bump bonding yield improvement study, the time walk correction (WTC) generality study with one pixel WTC applying to all pixels, the final SEU testing using both heavy ion and proton beam, more beam test studies including different sensors and irradiated sensors, and readiness for the ETROC2 production for CMS ETL upgrade.
Summary (500 words)
Summary (500 words)
The ETROC2 is the first full size (16x16) and full functionality prototype design (65 nm) and its dimensions are 21mm x 23mm. It is designed to process LGAD signals with time resolution down to ~ 40-50ps per hit in order to achieve ~30-35ps per track with two-layer detectors. The ETROC2 chips have been extensively tested since May 2023, with laser, hadron beam at CERN and electron beam at DESY, with temperature vs voltage vs TID scan, with proton beam and heavy ion beam for SEU and wafer probe testing and stress testing using charge injections.
Since last TWEPP, much more studies have been performed. In this talk, we will present new results including the bump bonding yield improvement study, the time walk correction (WTC) generality study with one pixel WTC applying to all pixels, more SEU tests with full SEU data analysis using both heavy ion and proton beam with dedicated SEU design verifications as cross check, more beam test studies with low temperature operation including irradiated sensors, and the readiness for the ETROC2 final production for CMS ETL upgrade.
The bump bonding yield has been significantly improved with new batch of 16x16 HPK sensors, followed by thermal cycling tests to check the robustness of the bump bonding connections. Beam tests have been performed to compare the performance with room temperature vs cold temperature for different type of sensors, including 15x15 IME sensors from ATLAS.
Dedicated study has been performed using large set of beam data collected so far to study the time walk correction (WTC) generality with one pixel WTC applying to all pixels. The ETROC2 chip has been designed such that every pixel is physically identical, with one pixel layout, then tiled on the floor in 16x16 array. TDC delay cell variations due to temperature or IR drop voltage can be calibrated out by the TDC self-calibration using double time stamps. TWC can be done for one pixel once, then be applied to the rest of the runs so long as the operation conditions are the same. This also means TWC from one pixel and from one run could apply to all other pixels on the same chip so long as the sensor pixels have uniform performance. Both have been demonstrated with recent beam data.
The SEU testing using both proton beam and heavy ion beams were performed back in 2024, and the tests have been repeated in 2025 with improved setups. The full SEU data analysis from both heavy ion beam and proton beam will be summarized, including more dedicated SEU design verification studies to cross check and verify the testing results.