Speaker
Description
In preparation for operations at the HL-LHC, the CMS Collaboration is upgrading its endcap calorimeters with a high granularity calorimeter (HGCAL). The HGCAL back-end electronics includes two Non-Zero Suppression (NZS) boards, which dynamically disable zero-suppression in designated regions of interest. This paper presents a detailed discussion of the NZS algorithm’s principal components, and a comprehensive account of the hardware testing performed on the Serenity 3 platform, including validation against a Python-based digital twin. The resulting system delivers 432-bit NZS flags, disabling zero suppression on the front-end sections, to each of the 48 DAQ (Data Acquisition) boards of one endcap.
Summary (500 words)
Non-Zero Suppression (NZS) is a key technique utilized in high-energy physics experiments, particularly within the CMS High Granularity Calorimeter (HGCAL), to efficiently manage massive data streams by selectively disabling zero suppression in areas of interest. Typically, front-end (FE) electronics apply threshold-based suppression, recording only channels whose detected energies surpass predefined thresholds. In scenarios requiring comprehensive data collection, the NZS mode ensures full readout of selected regions. The NZS algorithm is implemented on a Serenity S board containing a Xilinx VU13P FPGA. It receives data from the Endcap Muon Track Finder (EMTF) through twelve 25 Gbps links. Data processed within the board is then transmitted via six ×12 TX modules, each operating at 25 Gbps, to 48 Data Acquisition (DAQ) boards. An NZS flag, which provides fast control flow, is passed to the FE electronics via the DAQ board to switch between suppressed and non-suppressed readout modes. The internal architecture of the NZS system consists of several specialized submodules arranged in a pipeline configuration.Each packet is filtered in UMF blocks based on pseudo-velocity (η), azimuth angle (φ), and transverse momentum (p_T) by a threshold that can be configured via the IPBUS software. Only candidates that pass these user-defined thresholds proceed to the next state. Outputs from the UMFs are directed to an Energy Sorting stage, employing a bitonic sorting algorithm that prioritizes candidates with the highest transverse momentum. Sorted data then moves to the Synchronizer, which buffers these results for a programmable duration set through IPBUS. This buffering aligns candidate data temporally before further processing. Subsequently, the Stream Selectors utilize lookup tables (LUTs) (A12/D432) to map coordinates of the selected muon tracks to specific 432-bit patterns, identifying precisely which FE regions require disabling zero suppression. Outputs from multiple candidates are consolidated via an OR Accumulator, guaranteeing comprehensive coverage even when multiple muons overlap within the same region. For enhanced flexibility and system validation, specialized NZS Flag Settings registers are integrated, allowing operators to externally configure bits within the suppression patterns. This capability is particularly valuable for debugging and calibration procedures, ensuring targeted control over FE suppression modes. Finally, Formatter modules transform internal 432-bit NZS data into synchronized 64-bit data streams transmitted individually to each DAQ board at 25 Gbps. This precise formatting ensures reliable communication with downstream DAQ systems. In summary, the proposed NZS architecture is built on an FPGA with a pipelined structure designed to selectively preserve detailed calorimeter data required for precise physics analysis. Threshold-based filtering, configurable LUTs, sorting mechanisms, and synchronization techniques are integrated on the same structure. Hardware validation tests conducted on the Serenity 3 board and supported by detailed verification via a Python-based digital twin model have demonstrated robust performance and efficient resource utilization.
