Speaker
Description
Future Terascale-era experiments require scalable, high-performance data acquisition (DAQ) systems to handle extreme data rates. We present a DAQ solution based on the Advanced Mezzanine Card (AMC) standard, under development for the Micro-Vertex Detector (MVD) readout chain of the PANDA experiment. This contribution emphasizes the system’s modularity and scalability. A preliminary test card, targeting the power supply architecture and Module Management Controller (MMC), has been assembled and evaluated. We present the test results and recent design improvements of the AMC module, demonstrating progress toward a robust and flexible DAQ platform for the demanding needs of next-generation high-energy physics experiments.
Summary (500 words)
Future Terascale experiments aim to explore fundamental physics processes with unprecedented precision, leading to significantly higher data volumes and rates. To address these challenges, scalable data acquisition (DAQ) systems must be developed.
This contribution presents a DAQ system based on an Advanced Mezzanine Card (AMC), featuring a Zynq UltraScale+ System-on-Chip (SoC). This SoC combines a Field-Programmable Gate Array (FPGA) and a processor on a single chip, enabling the implementation of powerful signal processing algorithms—such as tracking or feature extraction—as well as data quality monitoring and slow control directly at the data source.
The DAQ system has been successfully tested within the first prototype of the readout chain for the Micro-Vertex Detector (MVD) of the PANDA (antiProton ANnihilation at DArmstadt) experiment. As the innermost component of the PANDA detector, the MVD will consist of silicon pixel and double-sided microstrip sensors for precise tracking and particle identification.
The MVD readout chain features the custom front-end ASIC ToASt (Torino ASIC for Strip Readout), which collects data from the sensors. Data from multiple ToASt modules are aggregated by the Module Data Concentrator (MDC) ASIC, developed at KIT. Several MDCs are connected to the AMC card via low-power Gigabit Transceivers (lpGBT), where the data streams are merged, processed, and transmitted to the computing node.
The MVD readout prototype includes two microstrip sensors, each connected to a ToASt (v1) module that interfaces with an MDC implemented on an FPGA, hosted on a general-purpose readout card developed at KIT. The MDC connects to a Versatile Link+ Demo Board (VLDB+), which links to the back-end electronics, mimicking the future AMC card using an AMD-Xilinx ZCU102 board. Firmware manages data collection from the front-end, while the embedded processor handles slow control and sensor configuration. The system effectively integrates real-time processing and control, confirming full functionality and readiness for further scaling.
The scalability of the system was evaluated by extending the setup to four sensors and ToASt (v1) modules, read out via two MDC-on-FPGA implementations, each connected to the ZCU102 board electronics through separate lpGBTs. Using the test pulse feature of the ToASt modules, a high data-throughput scenario (160 Mb/s per module, 640 Mb/s total) was simulated to assess the system's performance under increased data load and confirm its ability to reliably scale and handle higher data rates.
Additionally, advancements in the design and layout of the AMC readout module are presented. A test version of the module was assembled, focusing on the evaluation of the power supply and the Module Management Controller (MMC). The results validate key hardware components and contribute to the optimization of the final AMC design.
These results confirm the viability of the AMC-based DAQ system for the PANDA experiment and demonstrate its potential for future Terascale experiments.
