Speaker
Description
During the next LHC shutdown the LHCb-RICH subdetectors will undergo a major upgrade and their electronics chain will be redesigned. The new on-detector electronics architecture will employ bPOL12V power modules. This work presents the validation strategy and the test system, which was designed to assess the performance of such modules in various LHCb-RICH configurations. We performed qualitative measurements like: efficiency, transient response, start-up behavior, thermal studies, ripple etc. For our application, we identified working conditions with best compromise between efficiency, thermal dissipation and load. This system will be used to mass-test about 3500 power modules for the next LHCb enhancement.
Summary (500 words)
This talk presents a test system designed to evaluate the performance of the bPOL12V power modules which are considered for the future electronics chain of the LHCb-RICH subdetectors. The new electronics chain will be built around the newly designed FastRICH front-end ASIC, which will be configured and read out through the lpGBT ASIC and VTRX+ optical modules. A largely passive digital carrier board will act as an integration board and will connect everything and provide low-voltage power rails of 1.2 V and 2.5 V to the ASICs and optical modules. The current design of the future RICH carrier board foresees the integration of the power modules as plugins, to allow replacement. For this study, we built several prototype power modules based on the PCB design template provided by the bPOL12V design team.
Our test system (figure 1 of attachments) is build-up around a microcontroller-based PCB that is used to host the power modules and to control and supervise the tests. It is controlled by a LabVIEW-based graphical user interface, which is connected to the test system. These ensure precise measurements of the power conversion efficiency of the modules with 4 mV respectively 200 µA resolutions, as well as temperature dependent measurements. On the main PCB, we implemented an active electronic load, which is controlled by the user to draw a load current between 0 and 4 A. Based on our measurements we determined a working scenario for our RICH electronics, which foresee an input voltage of 7 V and with a load between 25 and 75 % per every power module. Within this scenario, the overall power conversion efficiency is between 70 and 75 %. Cooling is mandatory, as we found during testing that the power modules are dissipating enough thermal power to cause thermal shutdown in less than 60 s at maximum load. The overall recovery time for transient loads was measured to be of about 20 µs, and this can vary depending on the application and the capacitance on the power rail. The maximum ripple, which was measured on the output, was about 80 mV peak-to-peak. We foresee more tests with the bPOL12V-based power modules, and we aim to enhance their performance in terms of efficiency and output ripple with a proper choice of configuration. Within one RICH digital carrier board we have an estimated power consumption of about 17 W, out of which about 16.5 W is on the 1.2 V power rail. Therefore, we estimate that we need 5 power modules, with four modules to cover the 1.2 V rail and one for 2.5 V. For the 3rd LHC Long Shutdown, we would need about 500 RICH carried boards, which would require 2500 power modules, plus 1000 additional modules for R&D and spare. We intend to use an improved version of our test system to do the mass testing for 3500 power modules for the next LHCb-RICH enhancement.
