Speaker
Description
The High Granularity Timing Detector (HGTD) is a timing detector designed to mitigate pile-up effects in object reconstruction, arising from increased luminosity in the ATLAS Phase-II upgrade. The demonstrator system is a prototype system incorporating all key components of the HGTD project, developed to validate critical aspects of system integration. Installation and commissioning of this demonstrator system has been on-going since 2024 and was fully equipped with 54 modules, enabling the execution of the full-power test. Performance of the modules and prototype electronics will be presented.
Summary (500 words)
The High Luminosity Large Hadron Collider (HL-LHC) is an upgraded version of the LHC, designed to achieve instantaneous luminosities 5 to 7.5 times higher than the LHC nominal value. The significant increase in pile-up interactions is one of the main experimental challenges of the HL-LHC physics program. The High Granularity Timing Detector (HGTD) in the ATLAS Phase-II upgradeaims to mitigate pile-up effects in object reconstruction, particularly for jets, electrons, and b-jets.
As part of the HGTD program, the Demonstrator system has been developed to validate key aspects of integration. The Demonstratorsystem is equipped with some HGTD modules and read out through a prototype of the peripheral electronics and back-end.
The specific system tested in this study, referred to as the Demonstrator 1st Generation, has been under installation since 2024. It consists of a mechanical cooling box, full 54 HGTD ALTIROC front-end modules, a prototype Peripheral Electronics Board (PEB), a FELIX I/O card with its DAQ PC and prototypes of low voltage and high voltage modules.
A dedicated software system was also designed for the Demonstrator, integrating FELIX DAQ software with a script-based frameworkfor the PEB system. This software facilitates communication between key components, including the FELIX card, VTRx+ optical transceivers, Low Power GigaBitTransceiver (lpGBT), DC-DC converters (bPOL12V), and ALTIROC modules.
A comprehensive full-power test campaign was conducted on the Demonstrator 1st Generation, covering temperature distribution, module communication, and data reception at different transfer speeds. Temperature distribution was mapped using multiple sensors within the Demonstrator. The communication and data reception tests evaluated I2C communication, S-curve scanning and system-wide noise levels for all front-end modules. Additionally, data reception was tested at transfer speeds of 320 Mbps, 640 Mbps, and 1280 Mbps, marking the first time a front-end module operated at 1280 Mbps within the Demonstrator system. All tests were carried outat both room temperature and working temperature (-30$^{\circ}$C). The test results are compared with the results from a dedicated front-end module test setup based on a commercial evaluation board (ZC706) to understand the effect of the Demonstrator system.
