Speaker
Description
The Belle II experiment is a collider experiment using asymmetrically accelerated electrons and positrons with the world's highest luminosity.
The experiment uses a hardware trigger system consisting of customized electronic boards called Universal Trigger and other electronics.
The trigger system has a dedicated subsystem for the drift chamber of the Belle II detector, which measures the trajectories of charged particles.
This subsystem comprises wire mergers, Hough transformers, noise filters, and neural networks to find trajectories in low latency, which operate on the FPGA of the Universal Trigger boards.
We introduce an overview of the sub-trigger system and its upgrade plan.
Summary (500 words)
The Belle II experiment is a collider experiment using asymmetrically accelerated electrons(7 GeV) and positrons(4 GeV) with the world's highest luminosity. The experiment has a hardware trigger system to determine whether to record instantaneous data from subdetectors with a fixed latency of 4.4 microseconds, which operates on customized electronic boards for various trigger logic called the UT (Universal Trigger) boards, of which the latest generation UT4 has a total optical bandwidth of 1.3 Tbps and two FPGAs of Virtex UltraScale and Artix-7. Among the subdetectors, a drift chamber called the Central Drift Chamber(CDC) measures the trajectory of charged particles from the interaction point(IP), with 14336 sensing wires over nine superlayers that consist of six layers of wires (eight layers for the innermost superlayer).
The trigger system has a subtrigger system for the drift chamber, CDC Trigger(CDCTRG), which makes subtrigger decisions by multi-stage electronics connected through high-speed optical transmission. A Merger module implemented on a dedicated electronic board merges signals from the CDC front-end boards and sends the results to the Track Segment Finder(TSF) module. The TSF module implemented on UT4 finds geometrical patterns of hits called Track Segments(TS), and CDCTRG has nine UT4 boards for the TSF for each superlayer. The module finds TS with five layers in a superlayer and a look-up table that stores possible patterns. Next, the four UT4 boards of the 2D tracker reconstruct 2D tracks on the x-y plane from TS using the Hough transformation on the rho-phi plane, assuming a circular track from IP, and send the information on the transverse momentum and track angle to the 3D tracker modules and the global reconstruction logic. At the same time, the Event Timing Finder(ETF) module calculates the event timing using the timing information of TSs. The module reconstructs tracks similarly to the 2D finder and evaluates the median timing of TS associated with the reconstructed track as an event timing. Then, the module sends the timing information to the 3D tracker. The 3D tracker implemented on UT3 and UT4 reconstructs the z-coordinate of the origin of the tracks and a polar angle against the z-axis using results from a part of TSFs, the 2D trackers, and ETF. The primary purpose of the 3D tracker is to suppress the trigger rate generated by tracks from the beam-induced backgrounds, which mainly originate outside of IP. The tracker produces independent results using two algorithms: a conventional chi-squared fitting method on the r-z plane or a neural network method. The latter has been developed recently and shows better z-coordinate resolution.
Finally, the global reconstruction logic comprehensively makes trigger decisions for CDC using results from all the mentioned modules, and the results are used to catch B-mesons events.
CDCTRG plans to upgrade in line with the upgrade for the front-end boards of CDC. The new front-end board will have a 4 times larger bandwidth and stronger tolerance against radiation rays for dedicated trigger outputs than the current one. We expect to contribute to the suppression of the background trigger rate.