6–10 Oct 2025
Rethymno, Crete, Greece
Europe/Athens timezone

Session

Modules

9 Oct 2025, 09:00
Rethymno, Crete, Greece

Rethymno, Crete, Greece

Aquila Rithimna Beach Crete, Greece

Conveners

Modules

  • Andrea Boccardi (CERN)
  • E. D. Kyriakis-Bitzaros

Modules

  • Cristina Fernandez Bedoya (CIEMAT - Centro de Investigaciones Energéticas Medioambientales y Tec. (ES))
  • E. D. Kyriakis-Bitzaros

Modules

  • Cristina Fernandez Bedoya (CIEMAT - Centro de Investigaciones Energéticas Medioambientales y Tec. (ES))
  • Andrea Boccardi (CERN)

Presentation materials

There are no materials yet.

  1. Dr Richard Bates (University of Glasgow (GB))
    09/10/2025, 09:00
    Module, PCB and Component Design
    Oral

    ITk hybrid pixel detector consists of about 10,000 planar “quad” modules formed from 4 ASICs, (developed within the RD53 collaboration) bump bonded to a single sensor.
    The flexible PCB attached to the sensor connects the ASICs to the system and provides the module's electrical environment.
    To guarantee long-term reliability in the harsh HL-LHC environment, a tight quality control is...

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  2. Yiannis Kazas (Nat. Cent. for Sci. Res. Demokritos (GR))
    09/10/2025, 09:20
    Module, PCB and Component Design
    Oral

    We present the development of a 30 cm long Time-of-Flight (ToF) system targeting 30 ps timing resolution for charged particle detection. The system as part of a miniaturized charged particle spectrometer enables the extension of energy measurement to 2 GeV/n without using a magnet. Each of the two ToF channels integrate a plastic scintillator coupled to a silicon photomultiplier (SiPM),...

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  3. Yanbo Chu (Tsinghua University (CN))
    09/10/2025, 09:40
    Module, PCB and Component Design
    Oral

    One of the main challenges of picosecond TDC for 4D pixel detectors at future hadron colliders is the limitations of power consumption (down to $\mu$W/channel). To significantly reduce the power consumption and maintain other key specifications such as trigger rate and time resolution, a two-stage time-stretching TDC is proposed. This talk will present the proof-of-concept prototype design...

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  4. Julien Jiro Langouët (Aix Marseille Univ, CNRS/IN2P3, CPPM, Marseille, France)
    09/10/2025, 11:20
    Module, PCB and Component Design
    Oral

    The data acquisition system of LHCb Upgrade I is a single stage readout followed by event building, real time reconstruction and selection. A generic readout board, called PCIe400, embedding Altera’s flagship Agilex 7 M-series FPGA with a 4x112 Gbit/s serial interface and a PCIe Gen 5 interface constitutes a baseline for LHCb future upgrades. It also targets clock distribution with phase...

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  5. Federico De Benedetti (Universidade de Santiago de Compostela (ES))
    09/10/2025, 11:40
    Module, PCB and Component Design
    Oral

    In the new era of HL-LHC experiments, fast-timing detectors are emerging as a critical priority. Typical requirements include a temporal hit resolution of ~50 ps, spatial resolution of ~12 $\mu$m, and radiation hardness up to 10$^{16}$ neq/cm$^2$. To address these challenges, the development of non-standard sensor designs and advanced fast-readout electronics is required. The OPTIMA...

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  6. Xola Gugulethu Mapekula (University of Johannesburg (ZA))
    09/10/2025, 12:00
    Module, PCB and Component Design
    Oral

    The ATLAS Inner Tracker (ITk) will begin operation at the HL-LHC following LS3 for Run 4. Humidity inside the detector will be monitored using radiation-hard Fiber Optic Sensors based on Long Period Grating (LPG) and Fiber Bragg Grating (FBG), designed to operate below -20 °C and <10% humidity. Measuring relative humidity requires a complex method involving independent temperature and...

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  7. Stephen Goadhouse (University of Virginia (US))
    09/10/2025, 15:20
    Module, PCB and Component Design
    Oral

    The Barrel Calorimeter Processor (BCP), based on ATCA blade architecture, has been developed for the readout of the electromagnetic calorimeter (ECAL) and hadron calorimeter (HCAL) subdetectors. The BCP supports 120 optical receive channels of up to 25 Gbps, 72 optical transmit channels of up to 25 Gbps, an AMD XCVU13P UltraScale+ FPGA, and an embedded AMD Zynq UltraScale+ SoC. The production...

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  8. Dr Michele Caselle (KIT - Karlsruhe Institute of Technology (DE))
    09/10/2025, 15:40
    Module, PCB and Component Design
    Oral

    ALCYONE, an EU-funded project under the Horizon Europe program, addresses the impact of prolonged space exposure on biological systems, which is a critical challenge for future long-duration space missions. The project focuses on the development of a miniaturized on-chip micro-incubator to monitor and control environmental conditions for four types of cell cultures. To ensure precise radiation...

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  9. Dr Ilja Bekman (Forschungszentrum Juelich GmbH (DE))
    09/10/2025, 16:00
    Module, PCB and Component Design
    Oral

    The SHiP SBT self-triggered readout will process SiPM sum signals sampled at 800 MSPS and 12 bit resolution to extract calorimetric particle hit information.
    A waveform classification is being deployed on the readout FPGA to reduce the volume of transmitted data. The classification divides events into expected signal, expected noise or containing unexpected features applying different...

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