WIT2012 Workshop on Intelligent Trackers

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Application of intelligent detectors / Coupled sensors and monolithic architectures

Registration and Welcome

Real time pattern-recognition and advanced algorithms

Development of critical technologies and system integration

On-module electronic circuits (3D and conventional), intra-module and off-detector communication

Closeout

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Contributions*

3D Monolithically Stacked CMOS Active Pixel Sensor Detectors for Particle Tracking Applications. (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

3D Vertical Integration Technology for Fast Pattern Recognition (in session "Real time pattern-recognition and advanced algorithms")

A 0.18 μm CMOS Low-Power Radiation Sensor for Asynchronous Event-Driven UWB Wireless Transmission (in session "Posters")

A clusterization algorithm for ATLAS pixel upgrade. (in session "Real time pattern-recognition and advanced algorithms")

A Dedicated Electronics-Based Pixel Tracking System for CMS for HL-LHC Luminosities (in session "Posters")

A Fast Clustering Block for Silicon Strip Seeded Track Trigger (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

A fast digital readout architecture for vertically integrated pixel sensors (in session "Posters")

A Fast General-Purpose Clustering Algorithm Based on FPGAs for High-Throughput Data Processing (in session "Posters")

A Fast Hardware Tracker for the ATLAS Trigger System (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

A hybrid module architecture for a prompt momentum discriminating tracker at HL-LHC (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

A Level-1 Track Trigger for CMS with double stack detectors and long barrel approach (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

A Level-1 Tracking Trigger for the CMS Upgrade using stacked silicon strip detectors and advanced pattern recognition technologies (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

A Low Mass On-chip Readout Scheme for Double-sided Silicon Strip Detectors (in session "Posters")

A real-time clustering ASIC for the PXD in Belle II (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

A Self Seeded First Level Track Trigger for ATLAS (in session "Real time pattern-recognition and advanced algorithms")

A tracker for the novel mu3e experiment based on high voltage monolithic active pixel sensors (in session "Posters")

Active Pixel Sensors in high-voltage CMOS technologies for ATLAS (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

An innovative detection module concept for PET (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

Application for front end intelligence in gaseous pixel detectors for triggering (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

Asynchronous readout architectures for Tracker Front-End ASICs (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

CBC2: a microstrip readout ASIC with coincidence logic for trigger primitives at HL-LHC (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

Development of high performance tracking layers as a sandwich of optimised CMOS pixel sensors (in session "Posters")

Discussion (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

Discussion (in session "Real time pattern-recognition and advanced algorithms")

Discussion (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

Discussion (in session "Development of critical technologies and system integration")

FPGA and ASIC based algorithms for the present and upgraded LHCb silicon vertex detector (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

From hybrids pixels to smart vertex detectors using 3D technologies (in session "Development of critical technologies and system integration")

Front end intelligence for triggering and local track measurement in gaseous pixel detectors (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

Hybrid circuits and substrate technologies for the CMS Tracker upgrade (in session "Development of critical technologies and system integration")

Instrumentation of a track trigger with double buffer front-end architecture (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

Interconnect issues for the CMS 3-D track trigger (in session "Posters")

Introduction and logistic

MCM-D Technology for Silicon Strip Frontend Hybrids (in session "Development of critical technologies and system integration")

Micro-channel cooling for pixel detectors (in session "Posters")

Modulator Based High Bandwidth Optical Links for HEP Experiments (in session "Posters")

Monolithic Active Pixel Matrix with Binary Counters (MAMBO) ASIC, using a nested well structure to decouple the detector from the electronics (in session "Posters")

Multi_Gigabit wireless data transfer at 60 GHz (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

Nanosecond Timing Resolution with the APV25 (in session "Posters")

Online tracking applications of the general purpose EDRO Board (in session "Posters")

Pattern recognition with vector-type detector hits (in session "Real time pattern-recognition and advanced algorithms")

Progress on silicon and carbon foam composite wafers for interposer or hybrid use (in session "Posters")

Quadruple well CMOS MAPS for particle tracking with pixel-level analog processing, discrimination and time stamping (in session "Posters")

Radiation tolerant IP-cores for the control and readout of Front-End electronics in future Silicon detectors (in session "Posters")

Radiation-Hard and High-Speed Parallel Optical Engine (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

Status of Work on Vertically Integrated Circuits (in session "Posters")

Study of system integration for the pixel detector of the PANDA experiment (in session "Posters")

The CBC microstrip readout chip for LHC phase II (in session "On-module electronic circuits (3D and conventional), intra-module and off-detector communication")

The First Prototype for the FastTracker Processing Unit (in session "Posters")

The new variable resolution Associative Memory for Fast Track finding (in session "Real time pattern-recognition and advanced algorithms")

The Two 3Ds Combined: Tiles for Large Area Intelligent Arrays (in session "Development of critical technologies and system integration")

The ultra low mass cooling system of the Belle II DEPFET detector (in session "Posters")

Trigger and Data Acquisition Strategy for the LHCb Upgrade (in session "Application of intelligent detectors / Coupled sensors and monolithic architectures")

Use of Associative Memories for L1 triggering in LHC environment. (in session "Real time pattern-recognition and advanced algorithms")

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03/05/2012

04/05/2012

05/05/2012

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