28 September 2026 to 2 October 2026
Castelldefels, Barcelona, Spain
Europe/Zurich timezone

Session

ASIC - MAPS

29 Sept 2026, 15:20
Castelldefels, Barcelona, Spain

Castelldefels, Barcelona, Spain

Hotel Rey Don Jaime

Presentation materials

There are no materials yet.

  1. Miaoran Sun
    29/09/2026, 15:20
    ASIC
    Oral

    We present the monolithic particle sensor prototype Picopix2, implemented in a $180~\mathrm{nm}$ HV-CMOS technology. The sensor is based on a triple-well process with a high-resistivity substrate ($370~\Omega\cdot\mathrm{cm}$). Each pixel integrates a charge-sensitive amplifier with parallel discriminator paths, each equipped with its own TDC, enabling improved timing resolution through...

    Go to contribution page
  2. Milou Van Rijnbach (CERN)
    29/09/2026, 15:40
    ASIC - MAPS
    Oral

    The MALTA2 monolithic pixel sensor in 180 nm CMOS imaging technology has been characterised up to 5x10^15 neq/cm2, achieving >95% hit efficiency at 3x10^15 neq/cm2. This contribution presents the first test beam results of a modified MALTA2 design with increased n-layer doping, targeting efficient operation at the highest fluence. The enhanced doping is expected to improve charge collection...

    Go to contribution page
  3. Jelena Lalic (Massachusetts Inst. of Technology (US))
    29/09/2026, 16:00
    ASIC
    Oral

    We present an end-to-end design flow that connects detector simulation to silicon implementation, enabling realistic characterization of low-power embedded AI inference for noise rejection, clustering, and data compression in MAPS pixel detectors with continuous readout. The flow is technology-agnostic and is exercised here in a 28 nm standard CMOS process to close the simulation-to-silicon...

    Go to contribution page
  4. Grzegorz Deptuch (Brookhaven National Laboratory (US))
    29/09/2026, 17:40
    ASIC
    Oral

    The ePIC Silicon Vertex and Tracking (SVT) detector at the Electron–Ion Collider employs serial powering for most barrel layers and requires congregation of resource delivery, motivating an Application-Specific Integrated Circuit providing multi-power-domain shunt regulation, negative bias generation, slow-control management, and monitoring for MAPS-based sensors. Implemented in a 0.11 µm HV...

    Go to contribution page
  5. Davide Chiappara (CERN)
    29/09/2026, 18:00
    Logic - Digital Design, Verification Tools and Methods
    Oral

    This contribution presents the development of a system level simulation using PixESL to assess quantitatively the performances of the tracking devices developed within ALMIRA (ALice3 Monolithic Integrated tRacking Asic) project for ALICE upgrade. This fully developed simulation runs in about 30 second per orbit per cm2 and guides the design by estimating key ASIC performance metrics: timing...

    Go to contribution page
  6. Gianluca Aglieri Rinella (CERN)
    30/09/2026, 09:00
    ASIC
    Oral

    MOSAIX is a wafer‑scale Monolithic Active Pixel Sensor (MAPS) implemented in a 65 nm CMOS imaging process using stitching, with overall dimensions of 266×19.6 mm². It integrates all the functionalities required for the ALICE ITS3 Upgrade.

    This contribution provides a retrospective view of the development and implementation of the MOSAIX chip. It focuses on implementation challenges arising...

    Go to contribution page
  7. Dr Simone Scarfi' (CERN)
    30/09/2026, 09:20
    Logic - Digital Design, Verification Tools and Methods
    Oral

    The MOSAIX is a wafer-scale, full-functionality prototype ASIC for the ALICE Inner Tracking System (ITS3) upgrade, implemented in $65\,nm$ stitching technology.
    It integrates 144 independently powered pixel matrices, eight $10\,Gb/s$ serializers, and on-chip data and power distribution, making full-chip verification highly resource-intensive (over $80\,GB$ of memory and 175.000 tests)....

    Go to contribution page
  8. Dominik Dobrijevic (CERN)
    30/09/2026, 09:40
    ASIC - MAPS
    Oral

    The MOSAIX (MOnolithic Stitched Active pIXel) detector is a wafer-scale silicon sensor for the ALICE ITS3 upgrade. Measuring 26.6 × 1.96 cm$^2$ it operates with air cooling, limiting its power budget. It features a high-speed data hub, accumulating information from the 144 independent pixel matrices. Powering five domains exclusively from the short edges presents constraints: analog IR drop...

    Go to contribution page
  9. Ola Slettevoll Groettvik (CERN)
    30/09/2026, 11:20
    ASIC - MAPS
    Oral

    The ALICE ITS3 upgrade for LHC Run 4 employs a stitched, wafer-scale monolithic active pixel sensor for the first time in high-energy physics. MOSAIX, the final full-scale prototype, integrates 144 independently powered pixel matrices, eight 10 Gb/s transmitters, and on-chip power and data distribution across 27 cm. The qualification system developed prior to sensor delivery proved critical in...

    Go to contribution page
  10. Maximilian Babeluk
    30/09/2026, 11:40
    ASIC - MAPS
    Oral

    The ALICE ITS3 upgrade for LHC Run 4 uses stitched wafer-scale MAPS, enabling a material budget of $0.9\%\ X_0$ per layer with bent, $50\,\mu m$ thick modules. The full-scale prototype sensor, MOSAIX, integrates power and data distribution, power-gated sensor tiles, and high-speed transmitters. System integration and performance aspects including power, electrical, optical and signal...

    Go to contribution page
  11. Szymon Bugiel (CERN)
    30/09/2026, 12:00
    ASIC - MAPS
    Oral

    For the LS3 ALICE ITS3 upgrade, an ultra-light (0.09\% X0 per layer) vertex detector based on wafer-scale monolithic pixel sensors thinned to 50 $\mu$m is being developed. MOSAIX is the full-scale, full-functionality prototype, integrating power distribution, signal processing, and data transmission on-chip. This contribution presents measurement results of MOSAIX, focusing on pixel matrix...

    Go to contribution page
Building timetable...