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Aug 12 – 18, 2012
US/Eastern timezone

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Silicon pixel and strip detector development for the upgrade of the ALICE Inner Tracking System

Aug 16, 2012, 4:00 PM
2h
Regency 1/3 and Ambassador

Regency 1/3 and Ambassador

Poster Experiment upgrades, new facilities, and instrumentation Poster Session Reception

Speaker

Giacomo Contin (Universita e INFN (IT))

Description

The main physics motivation for the upgrade of the Inner Tracking System of the ALICE experiment is to perform new measurements on charm and beauty production in heavy-ion collisions, dealing with the challenge of expected Pb-Pb interaction rates of up to 50 kHz. For this purpose, a new silicon tracker is needed with greatly improved features in terms of determination of the distance of closest approach to the primary vertex, standalone tracking efficiency at low transverse momentum, momentum resolution and readout rate capabilities. The ITS upgrade foresees to replace the present ITS detector with a new seven layer silicon vertex detector. Two layouts are being considered: Layout 1 foresees to equip all layers with monolithic silicon pixel detectors; Layout 2 will consist of 3 layers of hybrid silicon pixel detectors and 4 layers of double-sided silicon strip detectors. For the innermost layers, there is a strong effort to decrease the pixel dimensions to about 20-30 um in the bending direction and equivalently in the beam direction and to reduce the material budget from 1.1% to 0.3% of X0, by using monolithic pixel detectors or hybrid pixel detectors with thinned chip and sensor, and minimizing the contribution coming from supports and services. The different types of monolithic pixel detectors under consideration for the ALICE ITS upgrade are: the rolling shutter, low power, architecture of the MIMOSA26 and ULTIMATE sensors, moved to a 0.18 um technology node; the INMAPS prototype, an in-pixel hit discrimination CMOS sensor based on a deep p-well extension of a triple-well 0.18 um CMOS; the LePIX development, a drift-based monolithic sensor in very deep submicron CMOS. The expected radiation levels for the innermost layer (685 krad TID, 10^13 neq per year) will require a careful validation of the different technologies in terms of radiation resistance. On the outermost layers the needed granularity and pointing resolution can be ensured by a strip detector geometry with a small cell size (95 um strip pitch, 22 mm strip length) and a small strip inclination with respect to the beam direction. The information on the signal amplitude will be preserved for the strip sensors for particle identification purposes. The strip readout chip will incorporate a low power ADC with 10 bits resolution. The present status of the technology development for the considered options will be reported.

Primary author

Giacomo Contin (Universita e INFN (IT))

Presentation materials