Session

III.c Embedded Software

3 Jun 2014, 11:00
Beurs van Berlage

Beurs van Berlage

Conveners

III.c Embedded Software: Session 1

  • Clara Gaspar (CERN)

III.c Embedded Software: Session 2

  • Lauren Alexandra Tompkins (University of Chicago)

Presentation materials

There are no materials yet.

  1. Pierluigi Luciano (Sezione di Pisa (IT))
    03/06/2014, 11:00
    Data-processing: 3c) Embedded software
    Oral
    The Associative Memory (AM) system of the FTK processor has been designed to perform pattern matching using the hit information of the ATLAS silicon tracker. The AM is the heart of the FTK and it finds track candidates at low resolution that are seeds for a full resolution track fitting. To solve the very challenging data traffic problem inside the FTK, multiple designs and tests have been...
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  2. Christos Gentsos (Aristotle Univ. of Thessaloniki (GR))
    03/06/2014, 11:20
    Data-processing: 3c) Embedded software
    Oral
    The Fast Tracker (FTK) processor [1] for the ATLAS experiment has a computing core made of 128 Processing Units that reconstruct tracks in the silicon detector in a ~100 μsec deep pipeline. The track parameter resolution provided by FTK enables the HLT trigger to identify efficiently and reconstruct significant samples of fermionic Higgs decays. Data processing speed is achieved with...
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  3. Calliope-louisa Sotiropoulou (Aristotle Univ. of Thessaloniki (GR))
    03/06/2014, 11:40
    Data-processing: 3c) Embedded software
    Oral
    The high performance multi-core 2D pixel clustering FPGA implementation used for the input system of the ATLAS Fast TracKer (FTK) processor is presented. The input system for the FTK processor will receive data from the Pixel and micro-strip detectors read out drivers (RODs) at 760Gbps, the full rate of level 1 triggers. Clustering is required as a method to reduce the high rate of the...
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  4. Jean Rinkel (L)
    03/06/2014, 12:00
    Data-processing: 3c) Embedded software
    Oral
    The dispersion of individual pixels parameters are widely studied in the field of hybrid pixel detectors for X-ray detection. CERN is developing methods of thresholds equalization to correct for threshold dispersion between pixels of the Medipix3RX readout chip. In this paper, we focus on the complex problem of pixel-to-pixel dead time dispersion, which cannot be corrected by simple flat field...
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  5. Mr Cahit Ugur (GSI Helmholtzzentrum für Schwerionenforschung GbmH)
    03/06/2014, 12:20
    Data-processing: 3c) Embedded software
    Oral
    One of the most crucial parts of the particle physics experiments, data digitisation, is being driven by the higher specifications for better particle identification. This increasing push by the experiments motivates the developers for different and better solutions for time, amplitude and charge digitisation methods. In our work we explain our solution for the tasks: TRB3 Platform. The...
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  6. Marius Wensing (Bergische Universitaet Wuppertal (DE))
    06/06/2014, 11:00
    Data-processing: 3c) Embedded software
    Oral
    The ATLAS experiment is the the largest of the four LHC experiments. Currently its Pixel-Detector is being upgraded with a new innermost 4th layer, the Insertable b-Layer (IBL). The upgrade will result in better tracking efficiency and compensate radiation damages of the Pixel-Detector. Newly developed front-end electronics (FE-I4) will require a complete re-design of the...
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  7. Shaw-Pin Chen (University of Washington (US))
    06/06/2014, 11:20
    Data-processing: 3c) Embedded software
    Oral
    The ATLAS Experiment is reworking and upgrading systems during the current LHC shut down. In particular, the Pixel detector is inserting an additional inner layer called Insertable B-Layer (IBL). The Readout-Driver card (ROD), the Back-of-Crate card (BOC), and the S-Link together form the essential frontend data path of the IBL’s off-detector DAQ system. The strategy for IBLROD firmware...
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  8. Dr Guido Volpi (Sezione di Pisa (IT))
    06/06/2014, 11:40
    Data-processing: 3c) Embedded software
    Oral
    The associative memory (AM) system is a computing device made of hundreds of AM ASICs chips designed to perform “pattern matching” at very high speed. Since each AM chip stores a data base of 130000 pre-calculated patterns and large numbers of chips can be easily assembled together, it is possible to produce huge AM banks. Speed and size of the system are crucial for real-time High Energy...
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  9. Massimiliano Fiorini (Universita di Ferrara (IT))
    06/06/2014, 12:00
    Data-processing: 3c) Embedded software
    Oral
    We describe a pilot project for the use of GPUs (Graphics processing units) in online triggering applications for high energy physics experiments. General-purpose computing on GPUs is emerging as a new paradigm in several fields of science, although so far applications have been tailored to the specific strengths of such devices as accelerator in offline computation. With the steady...
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  10. Aran Mol (I)
    06/06/2014, 12:20
    Data-processing: 3c) Embedded software
    Oral
    A self-contained gamma radiation spectrometer with embedded and automated temperature stabilization and full spectral analysis is presented. It consists of a crystal and PMT setup that is read-out using fast ADC and FPGA technology. The maximum dead-time has been established at 1.14 us and the energy resolution at 662 keV is 7%. Full spectral analysis has been implemented for naturally...
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