14–18 Oct 2013
Amsterdam, Beurs van Berlage
Europe/Amsterdam timezone

Computing on Knights and Kepler Architectures

15 Oct 2013, 13:53
22m
Effectenbeurszaal (Amsterdam, Beurs van Berlage)

Effectenbeurszaal

Amsterdam, Beurs van Berlage

Oral presentation to parallel session Software Engineering, Parallelism & Multi-Core Software Engineering, Parallelism & Multi-Core

Speaker

Sebastiano Schifano (U)

Description

An interesting evolution in scientific computing is represented by the streamline introduction of co-processor boards that were originally built to accelerate graphics rendering and that are now being used to perform general computing tasks. A peculiarity of these boards (GPGPU, or General Purpose Graphic Processing Units, and many-core boards like the Intel Xeon Phi) is that they normally ship on the one hand with a limited amount of on-board memory and, on the other hand, with several tens or even several thousands of processing cores. These facts normally require specific considerations when writing or adapting software so that it can efficiently run on them. In addition, programmability of these boards is often multi-faceted and needs to be carefully evaluated as well. An INFN project called Computing on Knights and Kepler Architectures, involving several INFN sites and collaborations, has been set up to investigate the suitability of these boards for scientific computation in a range of physics-related fields. The hardware targets for these investigations are the recently released x86-based Intel Xeon Phi and the K20-based NVIDIA GPGPU Tesla boards. We present the results of the investigations performed by this project using production samples of these boards. In particular, we will show adaptability, portability considerations, configuration tips and performance analysis for Xeon Phi and K20 cards applied to real use cases linked to the processing of data produced by experimental physics and to problems typical of theoretical physics, in single and multiple Phi and GPGPU configurations. We will also provide several micro benchmarks related to basic operations like memory copy and use of vector extensions.

Primary authors

Davide Salomoni (Universita e INFN (IT)) Francesco Giacomini (INFN CNAF) Gaetano Maron (Universita e INFN (IT)) Marcello Pivanti (Universita di Ferrara (IT)) Marco Caberletti (INFN) Matteo Manzali (INFN) Raffaele Tripiccione (INFN) Sebastiano Schifano (U)

Presentation materials