TWEPP-08 Topical Workshop on Electronics for Particle Physics

Session

Parallel session A2 - ASICs

A2

16 Sept 2008, 15:00

Naxos - GREECE

53. SPIROC (SiPM Integrated Read-Out Chip): Dedicated very front-end electronics for an ILC prototype hadronic calorimeter with SiPM read-out

Mr Julien Fleury (Laboratoire de l'Accélérateur Linéaire)

16/09/2008, 15:00

Oral

SPIROC embeds cutting edge features that fulfil ILC final detector requirements. It has been realized in 0.35m SiGe technology. It has been developed to match the requirements of large dynamic range, low noise, low consumption, high precision and large number of readout channels needed. SPIROC is an auto-triggered, bi-gain, 36-channel ASIC which allows to measure on each channel the charge...

61. A Readout ASIC for CZT and Si Detectors

Mr Lawrence Jones (STFC)

16/09/2008, 15:25

Oral

Spectrometers that can identify the energy of gamma radiation and determine the source isotope have until recently used low temperature semiconductors. These require cooling which makes their portability difficult. A relatively new material, cadmium zinc telluride, is now available which operates at room temperature and can be used to measure the energy of gamma radiation. In a compton camera...

109. Status Report on the LOC ASIC

Prof. Jingbo Ye (Southern Methodist Univeristy, Dpt of Physics)

16/09/2008, 16:15

Oral

The LOC ASIC is a serializer for data transmission. This ASIC development is supported by US-ATLAS upgrade program, and is based on a 0.25 μm Silicon on Sapphire technology. Characterization tests on the technology and the first prototype LOC1 have been carried out both in lab and in irradiation tests. Measurement results on jitter and Bit Error Rate of the ASIC as well as the TID and SEE...

103. Evaluation of Two SiGe HBT Technologies for the ATLAS sLHC Upgrade

Dr Miguel Ullan (CNM-IMB (CSIC), Barcelona)

16/09/2008, 16:40

Oral

As previously reported, silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technologies promise several advantages over CMOS for the ATLAS upgrade [8]. Since our last paper, we have evaluated the relative merits of the latest generations of SiGe HBT BiCMOS technologies, the 8WL and 8HP platforms. These 130nm SiGe technologies show promise to operate at lower power than CMOS...

89. The ABCN front end chip for ATLAS Inner Detector Upgrade

Jan Kaplon (CERN)

16/09/2008, 17:05

Oral

We present the design of the ABCN front end chip implemented in CMOS 0.25um technology and optimized for short, 2.5cm, silicon strip detectors intended to be used for the upgrade of ATLAS Inner Detector tracker. A primary aim of this project is to develop an ASIC with full functionality as required for readout of short silicon strips in the SLHC environment in a cost-effective and proven...