Speaker
Mr
Sverre Jarp
(CERN)
Description
Understanding scalable hardware
The lecture describes the hardware architecture of a modern x86_64 PC server. Architectures from other companies, such as Nvidia and ARM, will also be mentioned. Acceleration opportunities (but also bottlenecks) in the architecture will be covered in detail with an aim to give the students a good understanding of what resources are available from a hardware viewpoint.
We will also discuss several strategies which can allow software to scale to the maximum resource potential in a given architecture. These strategies are based on both data and task parallelism. We will stress the importance of a Data Oriented Design and also mention the issue of “performance portability” across platforms. Some important factors related to programming styles will be reviewed. To back up everything with evidence, a couple of scalable examples from physics will be portrayed.
