In order to face the increasing current demand of the highly integrated detectors for LHC experiment upgrades, we proposed in the past a new powering scheme based on DC-DC converters. They can provide in a more efficient way the required power: they allow driving less current in the long service cables and they grant a regulated and stable voltage to the FE electronics.
The converters have to be located in near proximity of the load, and therefore they are exposed to the severe experiment environment characterized by high level of radiation and magnetic field.
For this purpose we addressed the design of a full-custom radiation-hard Application Specific Integrated Circuit (ASIC) buck converter.
The ASIC, called FEAST2, is a single-phase synchronous buck converter designed in a commercial 0.35um high voltage technology. It embeds the power transistors and the control circuitry to provide a stable output voltage. It features also protection circuits as Over-Current, Over-Temperature and Input Under- Voltage to improve system-level security in the event of fault conditions.
The selection of an appropriate CMOS technology, coupled to the systematic use of Radiation Hardness By Design (RHBD) techniques, makes FEAST2 able to operate to more than 500Mrad(Si) total ionizing dose and an integrated particle fluence of 5x1014n/cm2 (1MeV-equivalent). FEAST2 has been designed to be resilient to Single Event Effects (SEE), and the circuit has been tested free of destructive SEEs and of output power interruptions during irradiations with heavy ions up to an equivalent LET of 64MeVcm2mg-1.
FEAST2 will be integrated in DC-DC converter modules, optimized to operate close to noise-sensitive front-end electronics and embedding custom-developed air core inductors to cope with the magnetic field.
We propose two modules: a positive FEASTMP converter and a negative FEASTMN. The first is able to provide an output voltage (0.6V-5V) and an output current up to 4A from and input voltage of 10-12V. The second can provide a negative output voltage (-0.6V down to -5V) from a positive input voltage (maximum value equal to 12V-|Vout|).
The design of both modules is finalized and ready for production. A first batch of FEASTMP is today being manufactured with 12 different output voltage configurations.
Each produced module is tested and the tests results are stored in a database accessible for the users from a webpage.
A low-profile third module, called FEASTMP-CLP is under development and will be available by the time of the conference, featuring a different plug-in connector for customers concerned by module height.